Dislocation-Free Shallow Trench Isolation (STI) Chemical Mechanical Polishing (CMP) Process for Embedded Flash Memory

Nam Hoon Kim; Hae Young Yoo; Eui Goo Chang

doi:10.4028/www.scientific.net/SSP.124-126.29

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Electrical Switching Characteristics of Nitrogen Doped Ge₂Sb₂Te₅ Based Phase Change Random Access Memory Cell
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Dislocation-Free Shallow Trench Isolation (STI) Chemical Mechanical Polishing (CMP) Process for Embedded Flash Memory
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HomeSolid State PhenomenaSolid State Phenomena Vols. 124-126Dislocation-Free Shallow Trench Isolation (STI)...

Dislocation-Free Shallow Trench Isolation (STI) Chemical Mechanical Polishing (CMP) Process for Embedded Flash Memory

Abstract:

The ambient and denuded trench top corner at the step of gate oxidation play an important role to generate defect. Furthermore, dislocation-free flash process is proposed, and its mechanism as well. The impact on dislocation of the other processes is also discussed. And we knew that using of dry oxidation for gate oxide has the characteristic to reduce the dislocation. Consequently, the dislocation free wafer is obtained by changing gate oxide from wet to dry in manufacturing embedded flash.

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Solid State Phenomena (Volumes 124-126)

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29-32

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https://doi.org/10.4028/www.scientific.net/SSP.124-126.29

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Online since:

June 2007

Authors:

Nam Hoon Kim, Hae Young Yoo, Eui Goo Chang

Keywords:

Dislocation, Gate Oxide, Shallow Trench Isolation, Thermo-Mechanical Stress

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