As semiconductor technology moves past the 32nm CMOS node, material loss becomes an ever more important topic. Besides impacting the size of physical features, material loss impacts electrical results, process control, and defectivity. The challenge this poses is further exacerbated by the introduction of new materials. The largest single influx of new materials has come over the last decade with the introduction of high-k/metal gate (HK/MG) materials. This paper focuses on the front-end-of-line (FEOL), summarizing key materials loss issues by process loop.