BEOL Post-Etch Clean Robustness Improvement with Ultra-Diluted Hf for 28nm Node

Abstract:

For 28 nm and beyond, severe specifications in terms of dimensions and materials integrity still drive further cleaning process improvements. As the global “HF budget” drastically decreases with interconnections dimensions, HF solution dilution and process time both decreased stepwise. However, very short recipes with process time shorter than 15s start to suffer from lack of robustness, in particular for the monitoring of inline parameters such as flow-rates and temperature. In this paper, we highlighted that a first matching of silicon oxide consumption was usefull to select temperature and concentration range for the diluted HF solution. High dilution ratio, and “room temperature” (20 °C) were then selected. Variations in cleaning efficiency were analyzed as regard with electrical defects density at three metals levels, then the use of 0.025 %wt. HF, 20 °C, 40 s. was pointed out as the more promising solution for process of record replacement. Process robustness, i.e. inline monitoring data collection and uniformity on wafer should thus be improved thanks to this longer process time and a lower process temperature.

• Periodical: Solid State Phenomena (Volume 282)
• Pages: 244-249
• DOI: https://doi.org/10.4028/www.scientific.net/SSP.282.244
• Online since: August 2018
• Authors: Lucile Broussous*, Remy Fabre, Thomas Massin, Hiwadezu Ishikawa, Fabrice Buisine, Alain Lamaury
• Keywords: BEOL Post-Etch Clean, CMOS 28nm, Copper Interconnections, Diluted HF

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