Preface
Investigation of Potential Impact of Nitridation Process on Single Event Gate Rupture Tolerance in SiC MOS Capacitors
p.1
p.1
Venus Surface Environmental Chamber Test of SiC JFET-R Multi-Chip Circuit Board
p.7
p.7
Coupled Non-Destructive Methods, Kelvin Force Probe Microscopy and µ-Raman to Characterize Doping in 4H-SiC Power Devices
p.13
p.13
Concept and Technology for Full Monolithic MOSFET and JBS Vertical Integration in Multi-Terminal 4H-SiC Power Converters
p.23
p.23
Comparing 4H-SiC NPN Buffer Layers by Epitaxial Growth and Implantation for Neural Interface Isolation
p.31
p.31
Modeling the Charging of Gate Oxide under High Electric Field
p.37
p.37
Complementary Two Dimensional Carrier Profiles of 4H-SiC MOSFETs by Scanning Spreading Resistance Microscopy and Scanning Capacitance Microscopy
p.45
p.45
Temperature Dependence of 4H-SiC Gate Oxide Breakdown and C-V Properties from Room Temperature to 500 °C
p.51
p.51
Preface
Abstract:
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Info:
Periodical:
Solid State Phenomena (Volume 358)
Online since:
August 2024
Сopyright:
© 2024 Trans Tech Publications Ltd. All Rights Reserved
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