Investigation of Potential Impact of Nitridation Process on Single Event Gate Rupture Tolerance in SiC MOS Capacitors

Misa Takahashi; Eiji Kagoshima; Takahiro Makino; Manami Iwata; Naoki Ohtani; Norio Nemoto; Shunki Narita; Takeshi Tawara; Junji Senzaki; Keisuke Kobayashi; Tomoka Suematsu; Shinsuke Harada; Akinori Takeyama; Takeshi Ohshima; Jun Saito; Hirokazu Fujiwara; Hiroyuki Shindou

doi:10.4028/p-xWA3h1

Paper Titles

Investigation of Potential Impact of Nitridation Process on Single Event Gate Rupture Tolerance in SiC MOS Capacitors
p.1

Venus Surface Environmental Chamber Test of SiC JFET-R Multi-Chip Circuit Board
p.7

Coupled Non-Destructive Methods, Kelvin Force Probe Microscopy and µ-Raman to Characterize Doping in 4H-SiC Power Devices
p.13

Concept and Technology for Full Monolithic MOSFET and JBS Vertical Integration in Multi-Terminal 4H-SiC Power Converters
p.23

Comparing 4H-SiC NPN Buffer Layers by Epitaxial Growth and Implantation for Neural Interface Isolation
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Modeling the Charging of Gate Oxide under High Electric Field
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Complementary Two Dimensional Carrier Profiles of 4H-SiC MOSFETs by Scanning Spreading Resistance Microscopy and Scanning Capacitance Microscopy
p.45

Temperature Dependence of 4H-SiC Gate Oxide Breakdown and C-V Properties from Room Temperature to 500 °C
p.51

HomeSolid State PhenomenaSolid State Phenomena Vol. 358Investigation of Potential Impact of Nitridation...

Investigation of Potential Impact of Nitridation Process on Single Event Gate Rupture Tolerance in SiC MOS Capacitors

Abstract:

Single Event Gate Rupture (SEGR) is one of the catastrophic failures caused by heavy ions in power MOS devices. In this study, n-type SiC MOS capacitors representing the gate structure generally used in SiC power MOSFETs were used to conduct heavy ion irradiation tests to clarify the SEGR mechanism. The Linear Energy Transfer (LET) dependence of the critical electric field (E_cr) for these capacitors was evaluated with two different oxidation processes in accumulation to confirm whether the oxidation process affects SEGR tolerance. We found that the E_cr value and slopes of the LET dependence for SEGR between DRY samples and DRY + POA samples were approximately consistent. We also simulated SEGR and studied its mechanism. The simulation results suggested that SEGR for SiC MOS capacitors is caused by carriers in electron-hole pairs generated by a heavy ion instead of gate electric field fluctuation.

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Periodical:

Solid State Phenomena (Volume 358)

Pages:

1-6

DOI:

https://doi.org/10.4028/p-xWA3h1

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Online since:

August 2024

Authors:

Misa Takahashi*, Eiji Kagoshima, Takahiro Makino, Manami Iwata, Naoki Ohtani, Norio Nemoto, Shunki Narita, Takeshi Tawara, Junji Senzaki, Keisuke Kobayashi, Tomoka Suematsu, Shinsuke Harada, Akinori Takeyama, Takeshi Ohshima, Jun Saito, Hirokazu Fujiwara, Hiroyuki Shindou

Keywords:

Failure Analysis, Heavy Ions, MOS Capacitor, Nitric Oxide, Post-Oxidation Annealing, Single Event Gate Rupture, Two-Dimensional Simulation

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* - Corresponding Author

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