Advanced Materials Research Vol. 748

Abstract: A high performance sample-and-hold (S/H) circuit with input common mode feedback (ICMFB) is presented. The ICMFB is used to ensure that the input common mode voltage for the sample-and-hold amplifier (SHA) is maintained at a known value during the hold phase of operation in order to reduce the differential output error when the sample capacitor and feedback capacitor has mismatch. Meanwhile, bootstrapped switches are used to lower the switch on-resistance and reduce the effect of switch non-idealities. Then a low power two stage high gain wideband SHA is designed to guarantee the holding accuracy. Hspice simulated results based on SMIC 0.13μm 1P5M CMOS process under 1.2V supply voltage shows a 108.4 dB spurious free dynamic range (SFDR) at Nyquist input @Fs=100MS/s. The designed S/H circuit has been used in the front end of 14-bit 100MS/s Pipelined ADC adapted for single-ended applications.

Abstract: Based on the latch and comparison theory, a high-speed high-resolution latched comparator is designed in this paper by using a standard 0.18μm/1.8V CMOS process. With the sampling frequency of 400MHz, the Cadence Spectre simulation results show that the regeneration time is around 230ps and only 11.83mV offset voltage, power consumption is 2.12mW, the minimum voltage resolution is 0.2mV without any input offset error. The circuit is applicable for the design of a high-speed high-resolution A/D converter.

Abstract: An effective method for low perming error of fluxgates is to enlarge the peak value of the excitation current, but large amplitude excitation will increase the power consumption. A narrow pulse excitation current with sufficient peak value can reduce perming error with low power consumption while increase the difficulty of the signal processing with low sensitivity. The perfected excitation waveform with high ratio of peak value to RMS value by careful excitation tuning is an efficient solution. This paper presents a novel circuit which can generate an excitation current waveform with high peak value and low RMS value for fluxgates. Different from the tuned excitation circuit, the proposed circuit is a combination of an integrator and a differentiator with the same squarewave input. The excitation signal is the sum of a triangle wave and a sharp narrow pulse signal. It is easy to adjust the peak value of the narrow pulses for perming error study and no careful tune adjusting is needed. Finally, in case of the fixed peak value of the narrow pulses, an improved excitation circuit with only two resistors, two capacitors and one amplifier is also presented in the paper. The experiment results show that 0.5nT perming error can be achieved for 10mT shock.

Abstract: A physical model of 0.24μm gate-length and 50μm gate-width AlGaN/GaN HEMTs is designed in the paper including lateral structure and longitudinal material parameters. Then DC and high frequency characteristics are both simulated and analyzed. The results show that the saturation drain current is 0.8A/mm at zero bias and the maximum transconductance is 350mS/mm. The current gain cutoff frequency (fT) and maximum frequency of oscillation (fmax) are 35GHz and 107GHz respectively at -2V gate voltage and 25V drain voltage. The maximum available power gains (MAG) is 10.2dB at 40GHz. Therefore, the structure can be applied to Ka-band.

Abstract: An improved DWA method for 14-bit 5+4+5 segmented current-steering digital-to-analog converters is proposed. Through to SFDR and dynamic performance of compromise consideration, this method uses two barrel shifters to control the starting position of the current element sequence every four clocks. Compared with the conventional DWA method, it features smaller device size and improves SFDR. And based on SIMULINK platform, through the establishment of high level of current steering D/A converter model with matching errors and output impedance. The simulation results show that SFDR is improved about 25dB.

Abstract: A successful design which used FPGA to do Positive/Zero/Negative Justification for adapting E1 (2.048Mbit/s) to SDH C-12 is presented. Gray code is adopted to realize the sampling of write pointer in reading clock domain and induct frequency doubling technology to deduct/insert reading clock, and a positioning counting device is set to complete the positioning insert of specified bytes. Asynchronous FIFO and Ping-Pong operation technique are both adopted. The design realizes stimulation, placement and routing under Quartus II 9.0 circumstances. It is a reusable hardware module which increases performance when compared to existing solutions.

Abstract: With the increasing application of renewable energy and clean fossil energy in the form of distributed generation in network, active load also take part in the operation of power system. Referring to the distribution network programming, it becomes more and more important to study on active load, multiply generation and distribution network coordination programming. This paper proposes a bi-level programming model to solve the problem of the coordination between the multiply generation and distribution network programming: first, treat the active load, distributed generation and centralized generation as generalized power, the cost characteristics of which decide the position in the annual load duration curve, and then work out the installations of them. Second, achieve the distribution network programming and the configuration of various types in power grid which is constrained to the results in the first layer of the programming, and aims at minimizing the investment in programming.. Modify the first programming by this result, after iteration, then we can obtain the best investment programming. In the end, take the 6-node system for example to verify the validity of this method.

Abstract: This paper firstly describes the important position of information science in complex system and the relationship between them. And then by the detailed analysis, point out that the uncertainty of information is absolute and certainty is relative in the information age. the important significance on uncertain information research is emphasized. and a research relationship: uncertainty informationinformation sciencecomplex system is also established. Finally, that the research prospect, processing method and theoretical basis for uncertain information are proposed.

Abstract: From the core concepts of SOA (Service-Oriented Architecture) "Service" starting the service composition is discussed in detail, from the service relationships network modeling, services dynamic composition approach based on Business Process Execution Language BPEL (Business Process Execution Language) is proposed in this paper, meanwhile two concepts of service agent and service quality are described, which achieve the service process dynamic execution.

Abstract: Based on Barnards classical organization theories this article presented new interpretion on the essence of supply chain and the position and role of information sharing in the supply chain, and then based on MSUs fundamental mode of supply-chain management to construct information-shared systemic frame of supply chain and indicated the positions and roles of different entities in information sharing on the mentioned research frame. This article also made research on information-shared entities in some aspects as the relation between information-shared entities and information-sharing, information sharing among entities, the information-shared motivation among entities and multi-entities information sharing and tried to enrich theoretical research of supply-chain information sharing.