Designs of 1.2 kV Rated Semi-Superjunction MOSFET on the 2D and 3D Planes for Practical Realization

Abstract:

This paper investigates the charge balancing and performance optimization of two 1.2 kV rated Semi-Superjunction (SSJ) MOSFETs. Beginning with a conventional double trench MOSFET, SJ trenches are imposed in 2D (within the X-Y plane unit cell) and in 3D (trenches in Z-Y plane, perpendicular to the gate trench). The optimization of these structures focuses on the effects of p-pillar doping, tilt angle, and z-plane pillar width and the trade-off between specific on-resistance R_on,sp, breakdown voltage (BV), implantation window, and gate reliability is assessed for each configuration. The 2D SSJ MOSFET, is the device that offers the highest breakdown voltage of those assessed (1781 V) and the widest implantation window (±25.4%), when implemented with a vertical trench sidewall, while this is a trade-off against achieving the lowest R_on,sp​, (1.15 mΩ.cm²) with a 12.5° side wall angle. In the 3D SSJ MOSFET, a reduced p-pillar depth in the z-dimension, and hence a higher doping density, leads to a significant improvement in R_on,sp. The Z-plane p-pillars in the 3D device efficiently deplete its JFET region, causing the R_on,sp of the 3D devices to be higher than the 2D devices, and the breakdown voltage lower. However, this also results in very low electric field (<0.5 MV/cm), in the gate oxide, offering a safe alternative to the 2D devices (1.69 MV/cm). Differences between the devices could be narrowed in the future with optimal JFET design.

• Periodical: Key Engineering Materials (Volume 1021)
• Pages: 51-58
• DOI: https://doi.org/10.4028/p-O4vzNM
• Online since: September 2025
• Authors: Virendra Kotagama*, Arne Benjamin Renz, Kyrylo Melnyk, G.W.C. Baker, Vishal Ajit Shah, Marina Antoniou, Peter Michael Gammon
• Keywords: 4H-SiC, MOSFET, Semi-Superjunction, Superjunction

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