Paper Titles
Preface
Design and Characterization of an ODMR System for NV-Based Quantum Sensing
p.1
Towards a Fully Integrated 4H-SiC A-Plane Quantum-Chip – Transistors and Light Emitters
p.7
Scalable Fabrication and Electrical Characterization of Lateral Pin-Diodes on 4H-SiC A-Plane Wafers for Functionalization of Silicon Vacancies
p.17
4H-SiC Tunneling Light Emitter as a Light-Source for Quantum Applications
p.27
A Simulation Study of Electronic Device Designs for the Control of SiC Color Centers as Spin Qubits
p.33
Experimental Investigation of Single-Event Effect Mechanisms in 1200V SiC VDMOSFETs under Heavy-Ion Irradiation
p.41
Channel Length Effects on Threshold Voltage Instability in Gamma Irradiated 4H-SiC PMOSFETs
p.47
High-Bandwidth Measurement of Laser-Induced Transient Responses in SiC Devices for Understanding Single Event Burnout Phenomena
p.55

Scalable Fabrication and Electrical Characterization of Lateral Pin-Diodes on 4H-SiC A-Plane Wafers for Functionalization of Silicon Vacancies

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Abstract:

Precise control of optical transitions of color centers like silicon vacancies (VSi) in 4H-SiC is essential for their functionalization. An applied electric field (E || c) of a pin-diode can be used to tune the optical properties of VSi centers via the Stark effect, while the associated space charge region under bias suppresses spectral diffusion. Unlike commonly used 4H-SiC c-plane wafers, a-plane wafers allow a scalable fabrication of lateral pin-diodes and resonant laser excitation of the VSi perpendicular to the wafer surface (a ⊥ c). In this work non-circular lateral pin-diodes oriented perpendicular to the wafer flat were produced in a scalable, CMOS-compatible process. Electrical characterization revealed that 97% of the devices on an a-plane wafer with n-type epitaxial layer were functional, exhibiting breakdown voltages exceeding 200 V and reverse currents below 100 pA/µm, enabling low current noise during optical measurements. The diodes remained operational at cryogenic temperatures after frozen-out charge carriers were re-ionized by the applied electric field. Electron irradiation followed by thermal annealing at 600 °C was used to generate V2 silicon vacancies in the intrinsic region without significantly altering the electrical characteristics. Optically detected magnetic resonance (ODMR) measurements on selected single emitters confirmed the presence of V2 centers by detecting a contrast at 70 MHz, while cryogenic photoluminescence (PL) spectra revealed a zero-phonon line (ZPL) peak at 916 nm.

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Periodical:

Key Engineering Materials (Volume 1056)

Pages:

17-25

DOI:

https://doi.org/10.4028/p-e4cgTB

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Cite this paper

Online since:

May 2026

Authors:

Jannik H. Schwarberg*, Christian Gobert, Fedor Hrunski, Alexander May, Wolfgang Knolle, Birgit Kallinger, Fabian Schmid, Mathias Rommel, Jörg Schulze

Keywords:

4H-SiC A-Plane, CMOS, Lateral Pin-Diode, Scalability, Silicon Vacancy, Stark Tuning

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* - Corresponding Author

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