Experimental Analysis of 600V 4H-SiC Vertical and Lateral MOSFETs Fabricated on the same 6-Inch Substrate Using a Single Process

Abstract:

This paper aims to provide detailed experimental results of 4H-SiC vertical and lateral MOSFETs fabricated on the same 6-inch substrate using a single process flow. The cell optimization and fabrication scheme of both vertical and lateral MOSFETs are described in this paper. The measured electrical characteristics from both structures such as on-resistance, transconductance, threshold voltage, breakdown voltage, and capacitances are discussed. Resistance distribution and figure-of-merits of [R_on×C_iss], [R_on×C_oss], and [R_on×C_rss] for vertical and lateral MOSFETs are compared to further improve the characteristic of the lateral MOSFET.

• Periodical: Materials Science Forum (Volume 1004)
• Pages: 830-836
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.1004.830
• Online since: July 2020
• Authors: Nick Yun*, Justin Lynch, Woong Je Sung
• Keywords: 4H-SiC, ICs, JTE, Lateral MOSFET, RESURF, Vertical MOSFET

References

[1] D. Rossi, New emerging applications for smart power integrated circuits: technologies implications and new design techniques,, in 1998 IEEE International Conference on Electronics, Circuits, and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196), 1998, vol. 3, p.477–484.

DOI: 10.1109/icecs.1998.814043

[2] T. Kimoto, H. Kosugi, J. Suda, Y. Kanzaki, and H. Matsunami, Design and fabrication of RESURF MOSFETs on 4H-SiC(0001), (112 0), and 6H-SiC(0001),, IEEE Transactions on Electron Devices, vol. 52, no. 1, p.112–117, Jan. (2005).

DOI: 10.1109/ted.2004.841358

[3] N. Yun, J. Lynch, and W. Sung, Demonstration and analysis of a 600 V, 10 A, 4H-SiC lateral single RESURF MOSFET for power ICs applications,, Appl. Phys. Lett., 114, 192104, (2019).

DOI: 10.1063/1.5094407

[4] W. Sung and B. J. Baliga, A Near Ideal Edge Termination Technique for 4500V 4H-SiC Devices: The Hybrid Junction Termination Extension,, IEEE Electron Device Letters, vol. 37, no. 12, p.1609–1612, Dec. (2016).

DOI: 10.1109/led.2016.2623423

[5] W. Sung and B. J. Baliga, A Comparative Study 4500-V Edge Termination Techniques for SiC Devices,, IEEE Transactions on Electron Devices, vol. 64, no. 4, p.1647–1652, Apr. (2017).

DOI: 10.1109/ted.2017.2664051

[6] W. Sung, K. Han, and B. J. Baliga, A comparative study of channel designs for SiC MOSFETs: Accumulation mode channel vs. inversion mode channel," in 2017 29th International Symposium on Power Semiconductor Devices and IC,s (ISPSD), 2017, p.375–378.

DOI: 10.23919/ispsd.2017.7988996

[7] B. J. Baliga, Fundamentals of Power Semiconductor Devices, New York, NY, USA, Springer, 2008, ch.6, pp.287-288.

[8] M. Noborio, J. Suda, and T. Kimoto, 4H–SiC Lateral Double RESURF MOSFETs With Low on Resistance,, IEEE Transactions on Electron Devices, vol. 54, no. 5, p.1216–1223, May (2007).

DOI: 10.1109/ted.2007.894249

[9] M. Abouelatta-Ebrahim, A. Shaker, G. T. Sayah, C. Gontrand, and A. Zekry, Design considerations of high voltage RESURF nLDMOS: An analytical and numerical study,, Ain Shams Engineering Journal, vol. 6, no. 2, p.501–509, June (2015).

DOI: 10.1016/j.asej.2014.12.003