Gate Bias Effects on SiC MOSFET Terrestrial-Neutron Single-Event Burnout

Daniel J. Lichtenwalner; Donald A. Gajewski; Sei Hyung Ryu; Brett Hull; Scott Allen; John W. Palmour

doi:10.4028/p-4b1mb3

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HomeMaterials Science ForumMaterials Science Forum Vol. 1062Gate Bias Effects on SiC MOSFET...

Gate Bias Effects on SiC MOSFET Terrestrial-Neutron Single-Event Burnout

Abstract:

Power devices are susceptible to failure by terrestrial neutron single-event burnout (SEB) while in the high-voltage blocking state and above a V_DS threshold for that device. Typically, the SEB failure rate is measured at a high blocking voltage, with the source and gate at ground potential. Here the effect of a negative gate bias, commonly applied during MOSFET switching to the blocking state, on the SEB failure rate is examined. It is observed that the SEB failure rate is only weakly dependent on the negative gate bias, because it does not significantly affect the peak field in the drift region where avalanche breakdown is initiated. A negative gate bias of -8V_GS in the device blocking state at 1100V_DS only results in a 6% increase in the MOSFET SEB failure rate.

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Periodical:

Materials Science Forum (Volume 1062)

Pages:

463-467

DOI:

https://doi.org/10.4028/p-4b1mb3

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Online since:

May 2022

Authors:

Daniel J. Lichtenwalner*, Donald A. Gajewski, Sei Hyung Ryu, Brett Hull, Scott Allen, John W. Palmour

Keywords:

MOSFET, Oxide Reliability, Silicon Carbide, TDDB

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* - Corresponding Author

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