Paper Titles
Preface
Comparison of the Irradiation Temperature Effect of on the Carrier Removal Rates in GaN and SiC
p.1
Investigation of Mechanical Stress and Warpage in 200 mm Silicon Carbide Wafers: Implications for Production Scalability
p.7
Challenges in Measuring Thin SiO2 Layers on 4H-SiC via Spectroscopic Ellipsometry
p.15
A Frequency-EBIC Technique for High Spatial Resolution of the Effective Minority Charge Carrier Lifetime in SiC PN-Junctions
p.21
Evaluation of Oxide Processing Steps in SiC Technology Using Contactless Corona-Based CV Measurements
p.29
Characterization of the Electric Field in Silicon Carbide Detectors by Optical Beam Induced Current
p.37
A Study on Simplifying the Process of a Single Cycle for Multiple Epitaxy and Implantation Method to Fabricate SiC Super Junction
p.43
Effects of 673K Temperature Anneal on a 4H-SiC CMOS NOT Logic Gate
p.49

Investigation of Mechanical Stress and Warpage in 200 mm Silicon Carbide Wafers: Implications for Production Scalability

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Abstract:

Controlling wafer warpage is critical for SiC power device fabrication on 200 mm substrates. Residual mechanical stress in bare SiC wafers is a major contributor to bow and warp. In this study, photoelastic measurements were employed to reveal distinct stress levels among wafers from different vendors, which reflect differences in crystal growth and wafering processes. By decomposing the stress into radial and tangential components, two dominant stress distribution modes—symmetric and asymmetric—were identified. The results demonstrate a clear correlation between residual mechanical stress and wafer warpage in 200 mm SiC substrates.

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Periodical:

Materials Science Forum (Volume 1191)

Pages:

7-14

DOI:

https://doi.org/10.4028/p-gydQM7

Citation:

Cite this paper

Online since:

May 2026

Authors:

Lin Dong*, Qi Qi Wu, Stefan Nufer

Keywords:

200 mm SiC Wafer Technology, Mechanical Stress, Photoelastic Measurements, Wafer Warpage Analysis

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Creative Commons CC BY 4.0

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* - Corresponding Author

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