Challenges in Measuring Thin SiO2 Layers on 4H-SiC via Spectroscopic Ellipsometry
p.15
p.15
A Frequency-EBIC Technique for High Spatial Resolution of the Effective Minority Charge Carrier Lifetime in SiC PN-Junctions
p.21
p.21
Evaluation of Oxide Processing Steps in SiC Technology Using Contactless Corona-Based CV Measurements
p.29
p.29
Characterization of the Electric Field in Silicon Carbide Detectors by Optical Beam Induced Current
p.37
p.37
A Study on Simplifying the Process of a Single Cycle for Multiple Epitaxy and Implantation Method to Fabricate SiC Super Junction
p.43
p.43
Effects of 673K Temperature Anneal on a 4H-SiC CMOS NOT Logic Gate
p.49
p.49
Edge Termination Design for Ultra High-Voltage (>10 kV) 4H-SiC Power Devices Using Background Doping Modulation (BDM)
p.55
p.55
Carbon Vacancy Engineering on High-Temperature Annealing as a Cost-Effective Approach for Reverse Recovery Suppression in SiC-MOSFETs
p.61
p.61
4H-SiC Diodes to Probe Stark Effect Detection in 7Be Decay Lifetime
p.69
p.69
A Study on Simplifying the Process of a Single Cycle for Multiple Epitaxy and Implantation Method to Fabricate SiC Super Junction
Abstract:
The impact on doping profile, surface roughness and defect production of each process step for a suggested Multiple epitaxy and implantation (MEI) process for Super-junction has been investigated through Secondary Ion Mass Spectrometer (SIMS), Atomic Force Microscope (AFM), Deep Level Transient Spectroscope (DLTS) and Molten KOH etching. Results show that the suggested process can possibly reduce the cost of the original fabrication and speed up the process.
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Periodical:
Materials Science Forum (Volume 1191)
Pages:
43-47
DOI:
https://doi.org/10.4028/p-3U7wdg
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Online since:
May 2026
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