High-Reliability ONO Gate Dielectric for Power MOSFETs
Thin (~10nm) Si layers have been deposited using Rapid Thermal CVD at temperatures ranging 950°C-1050°C. RTCVD deposited Si layers have been oxidized using N2O at 1300°C during relatively short times (15min) to produce SiO2 layers of 20-30nm. The interfacial characteristics of N2O oxidized RTCVD layers have been studied using the conductance method, showing a reduced traps density and a low band bending fluctuation when compared with conventional N2O grown oxides on 4H-SiC substrates. The surface topology of these layers has also been analyzed evidencing an adequate topography with low roughness.
Roberta Nipoti, Antonella Poggi and Andrea Scorzoni
S. Tanimoto et al., "High-Reliability ONO Gate Dielectric for Power MOSFETs", Materials Science Forum, Vols. 483-485, pp. 677-680, 2005