Physical Simulation of Drain-Induced Barrier Lowering Effect in SiC MESFETs

C.L. Zhu; E. Rusli; J. Almira; Chin Che Tin; S.F. Yoon; J. Ahn

doi:10.4028/www.scientific.net/MSF.483-485.849

Paper Titles

Field Effect Mobility in n-Channel Si Face 4H-SiC MOSFET with Gate Oxide Grown on Aluminium Ion-Implanted Material
p.833

High Field Effect Mobility in 6H-SiC MOSFET with Gate Oxides Grown in Alumina Environment
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High Field Effect Mobility in Si Face 4H-SiC MOSFET Made on Sublimation Grown Epitaxial Material
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Modeling of Lattice Site-Dependent Incomplete Ionization in α-SiC Devices
p.845

Physical Simulation of Drain-Induced Barrier Lowering Effect in SiC MESFETs
p.849

High Power Lateral Epitaxy MESFET Technology in Silicon Carbide
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Broadband RF SiC MESFET Power Amplifiers
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Important Role of Parasitic Regions in Electrical Characteristics of SiC MESFETs
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Hole-Like Defects in n-Channel 4H-SiC MESFETs Observed by Current Transient Spectroscopy
p.865

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Physical Simulation of Drain-Induced Barrier Lowering Effect in SiC MESFETs

Abstract:

The drain-induced barrier lowering (DIBL) effect in 4H-SiC MESFETs has been studied using the physical drift and diffusion model. Our simulation results showed that the high drain voltage typically applied in short-channel 4H-SiC MESFETs could substantially reduce the channel barrier and result in large threshold voltage shift. It is also found that the DIBL effect is more dependent on the ratio of the gate length to channel thickness (Lg/a), rather than the channel thickness itself. In order to minimize the DIBL effect, the ratio of Lg/a should be kept greater than 3 for practical 4H-SiC MESFETs.