Optimisation of Heterostructure Bipolar Transistors in SiC

Chia Ching Chen; Alton B. Horsfall; Nicolas G. Wright; Anthony G. O'Neill

doi:10.4028/www.scientific.net/MSF.483-485.913

Paper Titles

Electrical Characteristics of 4H-SiC BJTs at Elevated Temperatures
p.897

1000 V, 30 A SiC Bipolar Junction Transistors and Integrated Darlington Pairs
p.901

A 4H-SiC BJT with an Epitaxially Regrown Extrinsic Base Layer
p.905

Low and High Temperature Performance of 600V 4H-SiC Epitaxial Emitter BJTs
p.909

Optimisation of Heterostructure Bipolar Transistors in SiC
p.913

Comparison of High-Voltage 4H-SiC Insulated-Gate Bipolar Transistor (IGBT) and MOS-Gated Bipolar Transistor (MGT)
p.917

Process and Device Simulation of a SiC Floating Junction Schottky Barrier Diode (Super-SBD)
p.921

Influence of Overgrown Micropipes in the Active Area of SiC Schottky Diodes on Long Term Reliability
p.925

Temperature Impact on High-Current 1.2kV SiC Schottky Rectifiers
p.929

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Optimisation of Heterostructure Bipolar Transistors in SiC

Abstract:

We present the results of a simulation study on the behaviour of 3C-SiC bipolar transistors fabricated using a 6H-SiC heterojunction emitter. We show that despite the potential barrier originating in the discontinuity of the conduction bands, that npn devices offer a higher common emitter gain in comparison to pnp devices. The base voltage corresponding to the maximum gain of the device is controlled by the tunnelling of carriers across the collector-base junction and is different for both npn and pnp devices.