‘Switch-Back Epitaxy’ as a Novel Technique for Reducing Stacking Faults in 3C-SiC

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A new technique that reduces stacking fault (SF) density in 3C-SiC, termed switch-back epitaxy (SBE), is demonstrated regarding its effects on morphological and electrical properties. SBE is a homoepitaxial growth process on backside of 3C-SiC grown on undulant-Si. The key feature of SBE, the surface polarity of residual SFs in 3C-SiC, which cannot be erased by heteroepitaxial growth on undulant-Si, is converted from the Si-face to the C-face. The SF density on the surface of 3C-SiC grown by SBE shows a remarkable decrease to one-seventh lower than that on undulant- Si. The leakage current of pn-diode epitaxially fabricated on the 3C-SiC substrate grown by SBE decreases to as low as one-thirtieth that on 3C-SiC substrate grown without SBE. These results suggest that SBE eliminates the SFs on the surface of 3C-SiC and subsequently reduces the leakage current at pn-junction thus fabricated.

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Periodical:

Materials Science Forum (Volumes 527-529)

Edited by:

Robert P. Devaty, David J. Larkin and Stephen E. Saddow

Pages:

291-294

Citation:

K. Yagi et al., "‘Switch-Back Epitaxy’ as a Novel Technique for Reducing Stacking Faults in 3C-SiC", Materials Science Forum, Vols. 527-529, pp. 291-294, 2006

Online since:

October 2006

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$38.00

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DOI: https://doi.org/10.1007/978-3-642-18870-1_9

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0. 1 0. 2 0. 3 10Leakage current density (A/cm2) Yield (%).

[10] Leakage current density (A/cm2) Yield (%).

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[20] [20] [0] 0. 1 0. 2 0. 3 10Leakage current density (A/cm2) Yield (%).

[10] Leakage current density (A/cm2) Yield (%).

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[20] [20] Fig. 5. Histograms of leakage current density at 100V at reverse bias voltage for pn diodes.