Correlation between Room Temperature Photoluminescence and Resistivity in Semiinsulating Silicon Carbide
A room temperature PL mapping technique was applied to establish the origin of resistivity variation in PVT-grown 6H SiC substrates. A direct correlation between the native defect-related PL and resistivity was found in undoped (V-free) samples. In vanadium-doped samples with low vanadium content, the resistivity showed a good correlation with the total PL signal consisting of contributions from both vanadium and native point defects. Well-known UD1 and UD3 levels were revealed by low-temperature PL spectroscopy. Some correlation was observed between these low-temperature PL signatures and the resistivity distribution.
Robert P. Devaty, David J. Larkin and Stephen E. Saddow
S. K. Chanda et al., "Correlation between Room Temperature Photoluminescence and Resistivity in Semiinsulating Silicon Carbide", Materials Science Forum, Vols. 527-529, pp. 717-720, 2006