Materials Science Forum Vols. 573-574

Abstract: The high reactivity of the free silicon surface and its consequence: the “omnipresent” native silicon dioxide hinders the interface engineering in many processing steps of IC technology on atomic level. Methods known to eliminate the native oxide need in most cases vacuum processing. They frequently deteriorate the atomic flatness of the silicon. Hydrogen passivation by a proper DHF (diluted HF) treatment removes the native silicon oxide without roughening the surface while simultaneously maintains a “quasi oxide free” surface in a neutral or vacuum ambient for short time. Under such circumstances the last thermal desorption peak of hydrogen is activated at around 480-500°C where the free silicon surface suddenly becomes extremely reactive. In this study we show that deuterium passivation is a promising technology. Due to the fact that deuterium adsorbs more strongly on Si surface than hydrogen even at room temperature, deuterium passivation does not need vacuum processing and it ensures a robust process flow.

Abstract: In this paper, gate dielectric scaling with nitrogen incorporation technologies is reviewed. In key technologies such as thermal nitridation, oxide/nitride stacked dielectric structure and nitrogen implant/plasma played fundamental role in advance of semiconductor industry. Besides the technologies, primary integration schemes and their impacts on device performance and reliability are also covered.

Abstract: The silicon oxide growth kinetics were investigated for single wafer rapid thermal (RTP) and large batch vertical furnace radical oxidation processes under varying conditions. An oxidation model is proposed in which the oxidation rate of hydrogen–assisted radical oxidation is a combination of constant–rate low pressure wet oxidation and an oxygen radical driven process decaying with increasing oxide thickness. The model parameters for selected RTP and batch furnace oxidation processes are extracted and discussed. The implications of this model are compared to observed properties of the radical oxidation process like lattice orientation, stress independence, bird’s beak formation and thickness uniformity.

Abstract: In this work we present a comprehensive comparison of ultra thin thermally nitrided (TN) to plasma nitrided (PN) gate dielectrics (GD). We will show that thermal nitridation is a promising technique to increase the nitrogen concentration up to 25%. Furthermore, we will demonstrate that ultra thin thermally nitrided GD have the potential to be an alternative solution compared to plasma nitrided GD. This work includes the analysis of physical and electrical parameters as well as reliability results from reliability characterization. Additionally, we investigated the impact of Deuterium on electrical parameters and reliability behavior.

Abstract: The paper reviews recent progress and current challenges in implementing high-k dielectrics in microelectronics. Logic devices, non-volatile-memories, DRAMs and low power mixedsignal components are found to be the technologies where high-k dielectrics are implemented or will be introduced soon. Two gate architectures have to be considerd: MOS with metal as gate electrode and MIM. In particular, Hf-silicates for logic and NVM devices in conventional MOS architecture and ZrO2 for DRAM cells in MIM architecture are discussed.

Abstract: Scaling of CMOS structures through the deep sub-micron range and into the nano-scale range (< 100 nm) has posed a number of difficult problems for processing technology. One main technological approach has been to improve the uniformity and conformality of deposited layers. As the Atomic Layer Deposition (ALD) has already demonstrated that it can overcome many of the limitations of current film deposition techniques, it seems to be the solution for very conformal layers of high quality on severe topography. The ALD method has been developed already in the 1970’s by Tumo Suntola and co-workers [1-4]. However, it has been in the past a rather unused method in the semiconductor industry. This has recently changed. During the last couple of years, the large semiconductor companies have spent a lot of effort in the utilization of ALD, but until now a production worthy ALD tool with low ‘Cost-of-Ownership’ (CoO) numbers was not available. One reason for the late introduction of ALD is that the method is rather slow compared with the state of art methods like CVD, PECVD and PVD. Nevertheless, due to the outstanding properties of the ALD technique, the drawback of slow deposition rate may be balanced by the parallel processing of many wafers in semiconductor furnaces, as described here.

Abstract: Secondary Ion Mass Spectrometry (SIMS) is frequently used in the characterization of thin films, coatings, diffusion processes, materials composition and in the analysis of implants. The SIMS technique has been continuously developed for more than 30 years. One of the main drivers was semiconductor technology. Standard implants in Si like B, As and P, implanted with a few keV to MeV energy are routinely measured with high precision. But nowadays with implant energies of 500 eV and below, when ultra shallow structures are examined, the desired information is in the first few nm to some tens of nm. This has a great impact on the analytical requirements and quantification procedures. Some of these aspects will be examined in this contribution.

Abstract: This work presents a summary on the use of rapid thermal processing for implant annealing. It gives a short historical overview of rapid thermal processing systems and the first implant anneal processes on these newly developed tools. We then looked in detail on the soak anneal and spike anneal processes and the influence of certain process parameters. For the soak anneal influences of the ambient, either oxidizing or nitriding, were evaluated. The results of spike anneal processes are influenced by the pre-stabilization temperature, ramp-up and ramp-down rate, peak temperature, and gaseous ambient. The need for shallow, abrupt and highly activated junctions leads to co-implantation of species like fluorine or carbon in conjunction with pre-amorphization. Nowadays, combinations of spike and millisecond annealing as well as millisecond annealing alone are in the focus.

Abstract: Since introducing Rapid Thermal Annealing, there has been disagreement among experimental data of ion-implanted and annealed layers. One explanation of these differences is the impact of optical irradiation and its interaction with semiconductor material. Although no plausible explanation has been offered, experimental evidence of “photonic effects” was reported in many works. In this work we estimate energy per atom available during recombination of the excited carriers. It is argued that the localization of energy states inside the band gap in ion-implant damaged material is responsible for “photonic effects.”

Abstract: About 25years after inventing the laser annealing effects of ion implanted semiconductors a summary of the related physical phenomena is given. The field of application for short and selectively deposited energy pulses in controlled thermally activated processing is critically reviewed with the emphasis on electrical activation of implanted layers. Starting form the energy deposition and continuing to the excited transport phenomena a set of regimes can be described, which allows the classification of the variety of laser annealing methods and their different application. Within the scope of controlled thermally activated processes in nanometer dimensions old phenomena like phase transitions in strong non-equilibrium to create metastable states or producing dissipative structures by nonlinear coupling effects with self-organization are taken into account for device generations beyond 45nm. The challenges and disadvantages of laser annealing methods for planar semiconductor technology will be elaborated with respect to the current progress in laser development.