Process Optimization for High Temperature SiC Lateral Devices

Maher Soueidan; Mihai Lazar; Duy Minh Nguyen; Dominique Tournier; Christophe Raynaud; Dominique Planson

doi:10.4028/www.scientific.net/MSF.615-617.585

Paper Titles

Nano-Electro-Structural Evolution of Ni-Si Ohmic Contacts to 3C-SiC
p.569

On the Formation of Ni-Based Ohmic Contacts to n-Type 4H-SiC
p.573

Phase Inhomogeneity and Electrical Characteristics of Nickel Silicide Schottky Contacts Formed on 4H-SiC
p.577

Aluminum Doping by Low-Temperature Homoepitaxial Growth for Ni Ohmic Contacts to p-Type 4H-SiC
p.581

Process Optimization for High Temperature SiC Lateral Devices
p.585

A Comprehensive Study of Hydrogen Etching on the Major SiC Polytypes and Crystal Orientations
p.589

HCl Etching Behavior on Low-Tilt-Angle and Step-Free 4H-SiC Surfaces
p.593

Comparison between Polishing Etching of On and Off-Axis C and Si-Faces of 4H-SiC Wafers
p.597

Electrochemical Polishing of p-Type 4H SiC
p.601

HomeMaterials Science ForumMaterials Science Forum Vols. 615-617Process Optimization for High Temperature SiC...

Process Optimization for High Temperature SiC Lateral Devices

Abstract:

Complementary lateral structures, N-JFETs, P-JFETS and bipolar diodes, have been implemented in p and n-type 4H-SiC wafers with epilayers. The device were optimized using finite element code MEDICITM simulations, based on ion implanted and etched Reduced-Surface-Field structures. Two Ti/Ni alloy composition are found to form ohmic contacts compatibles with high temperature device operation. 900°C and respectively 1000°C post-metallisation annealing during 2min are necessary. The presence of a graphite layer is determined by XPS (X-ray photon spectroscopy) analyses at the metal-semiconductor interface. On the fabricated p and n-type lateral JFETs, in blocking state, breakdown voltage as high as 600V are obtained.

You might also be interested in these eBooks

Silicon Carbide and Related Materials 2008

View Preview

Info:

Periodical:

Materials Science Forum (Volumes 615-617)

Pages:

585-588

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.615-617.585

Citation:

Cite this paper

Online since:

March 2009

Authors:

Maher Soueidan, Mihai Lazar, Duy Minh Nguyen, Dominique Tournier, Christophe Raynaud, Dominique Planson

Keywords:

High-Temperature, LJFET, RESURF, Ti/Ni Ohmic Contacts

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

References

[1] A. W. Ludikhuize: Proc. ISPSD 2000, (2000), p.11.

Google Scholar

[2] M. Imam, Z. Hossain, M. Quddus et al.: IEEE Trans. On Electron Dev. Vol. 50 (2003), p.1697.

Google Scholar

[3] E. Oliviero, M. Lazar, A. Gardon, C. Peaucelle, A. Perrat, J.J. Grob, C. Raynaud, D. Planson: Nucl. Instr. and Meth. in Phys. Res. B Vol 257 (2007), p.265.

DOI: 10.1016/j.nimb.2007.01.256

Google Scholar

[4] E. Oliviero, M. Lazar, H. Vang et al.: Mater Sci Forum Vols. 556-557 (2007), p.611.

Google Scholar

[5] M. Lazar, H. Vang, P. Brosselard, C. Raynaud, P. Cremillieu, J. -L. Leclercq, A. Descamps, S. Scharnholz, D. Planson : Superlattices and Microstructures Vol. 40 (2006), p.388.

DOI: 10.1016/j.spmi.2006.06.015

Google Scholar

[6] J. Crofton, L. M. Porter and J. R. Williams: Phys. Sata. Sol. (b) Vol 202, (1997), p.581.

Google Scholar

[7] E. Morvan, N. Mestres, F.J. Campos et al.: Mater Sci Forum Vol 338-342, (2000) p.893.

Google Scholar