Design and Yield of 9 kV Unipolar Normally-ON Vertical-Channel SiC JFETs

Abstract:

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Normally-ON 9.1 kV (at 0.1 mA/cm2), 1.52 x 10-3 cm2 active-area vertical-channel SiC JFETs (VJFETs), were fabricated at a 52% yield with no epitaxial regrowth and a three-step junction-termination-extension edge termination, which is connected to the gate bus through an ion-implanted sloped sidewall. The VJFETs exhibit low gate-to-source leakage currents of less than 1 nA up to VGS = -60 V, and sharp onsets of breakdown occurring at VGS ~ -80 V. The gate-to-source and gate-to-drain diodes turn on at 2.75 V, with the latter diode exhibiting higher resistance due to the thick epitaxial drift layer. To realize unipolar operation with low on-state resistance, the VJFET is designed very normally-ON which minimizes the channel resistance contribution. Consequently, threshold voltages are in the -3 V to -4.5 V range and transconductance is relatively low at < 0.36 mS. At a gate bias of 0 V, the VJFETs output a drain current of 73 mA with a forward drain voltage drop of 5 V (240 W/cm2), a specific on-state resistance of 104 mΩ-cm2, and a current gain of ID/IG = 6.4 x 109. Thus, these VJFETs are capable of efficient power switching, i.e., high current-gain voltage-controlled operation at a low unipolar resistance.

Info:

Periodical:

Materials Science Forum (Volumes 679-680)

Edited by:

Edouard V. Monakhov, Tamás Hornos and Bengt. G. Svensson

Pages:

617-620

DOI:

10.4028/www.scientific.net/MSF.679-680.617

Citation:

V. Veliadis et al., "Design and Yield of 9 kV Unipolar Normally-ON Vertical-Channel SiC JFETs", Materials Science Forum, Vols. 679-680, pp. 617-620, 2011

Online since:

March 2011

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Price:

$35.00

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