Charge Trapping in Sic Power MOSFETs and its Consequences for Robust Reliability Testing

Ronald Green; Aivars J. Lelis; Daniel B. Habersat

doi:10.4028/www.scientific.net/MSF.717-720.1085

Paper Titles

690V, 1.00 mΩcm² 4H-SiC Double-Trench MOSFETs
p.1069

SiC MOSFET Reliability Update
p.1073

Material Defects and Rugged Electrical Power Switching in Semiconductors
p.1077

Comparative Study of SiC MOSFETs in High Voltage Switching Operation
p.1081

Charge Trapping in Sic Power MOSFETs and its Consequences for Robust Reliability Testing
p.1085

4H-SiC MOSFETs with a Stable Protective Coating for Harsh Environment Applications
p.1089

Integration of Temperature and Current Sensors in 4H-SiC VDMOS
p.1093

SiC-MOSFET Structure Enabling Fast Turn-On and -Off Switching
p.1097

Calibration of Mobility and Interface Trap Parameters for High Temperature TCAD Simulation of 4H-SiC VDMOSFETs
p.1101

HomeMaterials Science ForumMaterials Science Forum Vols. 717-720Charge Trapping in Sic Power MOSFETs and its...

Charge Trapping in Sic Power MOSFETs and its Consequences for Robust Reliability Testing

Abstract:

Threshold voltage (VT) instability remains an important issue for the performance, reliability, and qualification of SiC power MOSFET devices. The direct application of existing reliability test standards to SiC power MOSFETs can in some cases result in an inconsistent pass/fail response for a given device. To ensure SiC MOSFET device reliability, some modifications to existing test methods may be necessary..