Calibration of Mobility and Interface Trap Parameters for High Temperature TCAD Simulation of 4H-SiC VDMOSFETs

M.G. Jaikumar; Shreepad Karmalkar

doi:10.4028/www.scientific.net/MSF.717-720.1101

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HomeMaterials Science ForumMaterials Science Forum Vols. 717-720Calibration of Mobility and Interface Trap...

Calibration of Mobility and Interface Trap Parameters for High Temperature TCAD Simulation of 4H-SiC VDMOSFETs

Abstract:

4H-Silicon Carbide VDMOSFET is simulated using the Sentaurus TCAD package of Synopsys. The simulator is calibrated against measured data for a wide range of bias conditions and temperature. Material parameters of 4H-SiC are taken from literature and used in the available silicon models of the simulator. The empirical parameters are adjusted to get a good fit between the simulated curves and measured data. The simulation incorporates the bias and temperature dependence of important physical mechanisms like interface trap density, coulombic interface trap scattering, surface roughness scattering and velocity saturation.

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Periodical:

Materials Science Forum (Volumes 717-720)

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1101-1104

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.717-720.1101

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Online since:

May 2012

Authors:

M.G. Jaikumar, Shreepad Karmalkar

Keywords:

4H-SiC, High-Temperature, Interface Trap, Mobility, TCAD, VDMOSFET

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References

[1] C. E. Weitzel et al., Silicon Carbide High-Power Devices, IEEE Trans. on Electron Devices, 10 (1996) 1732-1741.

DOI: 10.1109/16.536819

Google Scholar

[2] S. Dimitrijev and P. Jamet, Advances in SiC power MOSFET technology, Microelec. Reliability, 43 (2003) 225-233.

DOI: 10.1016/s0026-2714(02)00270-6

Google Scholar

[3] S. Potbhare et al., A Physical Model of High Temperature 4H-SiC MOSFETs, IEEE Trans. on Electron Devices, 8 (2008) 2029-2040.

DOI: 10.1109/ted.2008.926665

Google Scholar

[4] S. L. Rumyantsev et al., Channel Mobility and on-resistance of vertical double implanted 4H- SiC MOSFETs at elevated Temperatures, Semicond. Sci. Technol., 24 (2009) 1-6.

DOI: 10.1088/0268-1242/24/7/075011

Google Scholar

[5] Information on http://www. ioffe.ru/SVA/NSM/

Google Scholar

[6] S. Potbhare, Modeling and Characterisation of 4H-SiC MOSFETs: High Field, High Temperature and Transient Effects, Ph.D. Thesis, Uni. of Maryland, College Park, 2008.

Google Scholar

[7] B. A. Hull et al., Perfomance of a 60A, 1200V 4H- SiC DMOSFETs, Mater. Sci. Forum, 749 (2009) 615-17.

Google Scholar

[8] Sentaurus Device User Guide, Version D-2010.03, March 2010.

Google Scholar

[9] A. Perez-Tomas et al., A field-effect mobility model for SiC MOSFETs including high density of traps at the interface, Microelect. Engg., 83 (2006) 440-445.

DOI: 10.1016/j.mee.2005.11.007

Google Scholar