SiC Epi-Channel Lateral MOSFETs
p.927
p.927
600 V -Class V-Groove SiC MOSFETs
p.931
p.931
14.6 mΩcm2 3.3 kV DIMOSFET on 4H-SiC (000-1)
p.935
p.935
1200 V 4H-SiC DMOSFET with an Integrated Gate Buffer
p.939
p.939
Designing of Quasi-Modulated Region in 4H-SiC Lateral RESURF MOSFETs
p.943
p.943
Utilization of SiC MOSFET Body Diode in Hard Switching Applications
p.947
p.947
Development of 3.3 kV SiC-MOSFET: Suppression of Forward Voltage Degradation of the Body Diode
p.951
p.951
High Temperature Reliability of the SiC-MOSFET with Copper Metallization
p.955
p.955
Impact of Hot Carrier Degradation and Positive Bias Temperature Stress on Lateral 4H-SiC nMOSFETs
p.959
p.959
Designing of Quasi-Modulated Region in 4H-SiC Lateral RESURF MOSFETs
Abstract:
Characteristics of high-voltage lateral silicon carbide metal-oxide-semiconductor field-effect transistors (MOSFETs) with various reduced surface field (RESURF) structures were simulated. Breakdown voltage was enhanced from 5300 V for single-zone RESURF to 7400 V for two-zone, and to 7600 V for quasi-modulated RESURF MOSFETs.
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Info:
Periodical:
Materials Science Forum (Volumes 778-780)
Pages:
943-946
Citation:
Online since:
February 2014
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© 2014 Trans Tech Publications Ltd. All Rights Reserved
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