Materials Science Forum Vols. 778-780

Abstract: This paper introduces our recent challenges in fast 4H-SiC CVD growth and defect reduction. Enhanced growth rates in 4H-SiC epitaxial growth by high-speed wafer rotation and in a high-temperature gas source method promoting SiC bulk growth by increasing the gas flow velocity are demonstrated. Trials and results of deflecting threading dislocations by patterned C-face 4H-SiC epitaxial growth are also shown.

Abstract: SiC epitaxial layer with low basal plane dislocation (BPD) density of 0.2/cm² was successfully grown under higher C/Si ratio, which is found on the investigation about growth conditions. In order to study conversion mechanism of BPDs to threading edge dislocations (TEDs), angles between directions of BPD lines on a substrate and that of moving edges of steps ([11-2) during growth were examined. Consequently, it was revealed that almost 98% of BPDs are converted to TEDs for the case of the absolute angles above 45°. This high conversion ratio is considered to be induced by enhanced lateral growth under the higher C/Si ratio condition.

Abstract: In this paper we investigate the role of the growth rate (varied by changing the Si/H₂ ratio and using TCS to avoid Si droplet formation) on the surface roughness (R_q), the density of single Shockley stacking faults (SSSF) and 3C-inclusions (i.e. epi-stacking faults, ESF). We find that optimized processes with higher growth rates allow to improve the films in all the considered aspects. This result, together with the reduced cost of growth processes, indicates that high growth rates should always be used to improve the overall quality of 4H-SiC homoepitaxial growths. Furthermore we analyze the connection between surface morphology and density of traps (D_it) at the SiO₂/SiC interface in fabricated MOS devices finding consistent indications that higher surface roughness (step-bunched surfaces) can improve the quality of the interface by reducing the D_it value.

Abstract: We have investigated a conversion of basal plane dislocation (BPD) to threading edge dislocation (TED) in growth of epitaxial layers (epi-layers) on 4H-SiC vicinal substrates with an off-angle of 0.85° at low C/Si ratio of 0.7 by using deep KOH etching and X-ray topography observations. Deep KOH etching indicated that BPDs in the substrates converted to TEDs in the epi-layers. X-ray topography observations suggested that the conversion occurred during epitaxial growth when the thickness of epi-layers was less than 1.5 μm. We found that the conversion ratio obtained from counting deep KOH etch pits was over 99%.

Abstract: Results are presented for epitaxial SiC layers grown on 100 mm and 150 mm wafers suitable for power devices by CVD using a VP2800WW multi-wafer reactor with 10×100mm and 6×150mm configurations. We have demonstrated continuous improvement in uniformity for thickness and doping, as well as in defect reduction in standard epitaxy on 100 mm wafers. Thickness and doping sigma/mean values of <1.5% and <8%, respectively, could be routinely achieved. Doping and thickness measurements of 30 μm layer growth show results similar to standard epilayer growth. The averaged projected site yields of 80% for 5x5 mm² and of 96% for 2x2 mm² correspond to a low epitaxial defect density of <1 cm="" sup="">-2 in 30μm thick epilayers. Epilayer structures for bipolar devices like PiN diodes and BJTs are shown. The interface regions between nitrogen doped and aluminum doped layers show an abrupt transition of dopant concentration. Wafer quality of 100 mm and 150 mm material is presented as an important base factor for excellent epitaxial layer quality. It is shown that 150 mm substrates exhibit TSD and BPD densities very similar to the 100 mm materials. Site counts for TSDs and BPDs on sample wafers show dislocations densities of 500 cm^-2 and 300 cm^-2, respectively. After CVD process optimization, a thickness uniformity (sigma/mean) of <1.5% and a doping uniformity of <13% was achieved on epitaxial layers on 150mm.

Abstract: C-face epitaxial growth of 4H-SiC was investigated considering the use as drift layers of high blocking voltage SiC power MOSFETs, such as 3.3 kV, using a multiple-wafer epitaxy system. As high as 50.9 μm/h was achieved as the growth rate while maintaining specular surface within quasi-150 mm-diameter wafers. Also, it has been found that the background carrier concentration could be lowered enough to control the desired n-type doping concentration of nitrogen. In addition, high-throughput has been confirmed by comparing the current data with the recent results reported.

Abstract: Latest results are presented for SiC-epitaxial growths employing a novel 6x150-mm/10x100-mm Warm-Wall Planetary Vapor-Phase Epitaxial (VPE) Reactor. The increased throughput offered by this reactor and 150-mm diameter wafers, is intended to reduce the cost per unit area for SiC epitaxial layers, increasing the market penetration of already successful commercial SiC Schottky and MOSFET devices [1]. Increased growth rates of 30-40 micron/hr and short <2 hr fixed-cycle times (including rapid heat-up and cool-down ramps), while maintaining desirable epitaxial layer quality were achieved. Increased quantities of 150-mm epitaxial wafers now allow statistical analysis of their epitaxial layer properties. Specular epitaxial layer morphology was obtained, with morphological defect densities <0.4 cm^-2, consistent with projected 5x5 mm die yields averaging 93% for Si-face epitaxial layers between 10 and 30 microns thick. Intrawafer thickness and doping uniformity are good, averaging 1.7% and 5.1% respectively. Wafer-to-wafer doping variation has also been significantly reduced from ~12 [5] to <3% s/mean. Initial results for C-face growths show excellent morphology (97%) but poor doping uniformity (~16%). Wafer shape is relatively unchanged by epitaxial growth consistent with good epitaxial temperature uniformity.

Abstract: A single wafer type 150 mm vertical 4H-SiC epitaxial reactor with high-speed wafer rotation was developed. The rotation of the wafer at high speed significantly enhances the growth rate, and high growth rates of 40–50 μm/h are possible on 4°off-cut 4H-SiC substrates. In addition, a low defect density and smooth surface without macro step bunching can be achieved. Excellent uniformity of thickness and doping concentration was obtained for a 150 mm wafer at a high growth rate of 50 μm/h.

Abstract: Preliminary results of 150mm SiC 4H 4°off have been obtained with the new 150mm automatic horizontal hot wall reactor PE1O6, using chlorinated chemistry (SiHCl₃ + C₂H₄). A new injection system has been tested in two configurations and results will be shown in this paper. AFM surface roughness measurements and epi defect density have been reported.

Abstract: We have investigated key factors for controlling the polytype and surface morphology of 4H-SiC homoepitaxial growth on less than 4^o off-axis substrates. In addition, we characterized the crystal quality and surface quality of the epitaxial layer of an entire 3-inch vicinal off angled substrate. The results suggested that the control of surface free energy, control of the vicinal off angle itself, and high temperature growth, is highly important in controlling the surface morphology and polytype stability of the epitaxial layer grown on a vicinal off angled substrate. We also obtained a high-quality epitaxial layer grown on a 3-inch vicinal off angle substrate, which was comparable to those on 4^o off-axis substrates.