Materials Science Forum Vol. 954

Abstract: Back-grinding process was applied to the 4H-SiC (0001) epitaxial wafers. We found that the parameters about stress increased after back-grinding process. In our work, the characterization of stress on interface state density (D_it) of SiC/SiO₂ was investigated. Furthermore, the absorption of peak frequencies was also observed by fourier transform infrared spectroscopy attenuated total reflection (ATR-FTIR) analysis, and the D_it of SiC/SiO₂ was obtained by quasi-static capacitance voltage (QSCV) measurement as well as C-φ_s method. The above results suggested that the D_it increased with the increasing grinding-induced stress.

Abstract: In this study, TiN anode GaN Schottky barrier diodes (SBDs) with a low access sheet resistance of 28 Ω/□ were fabricated for microwave power transmission application. The performance of the diodes at room temperature (RT) is comparable with the ideality factor n and Schottky barrier height (SBH) were 1.28 and 0.47 eV for the 8-finger SBDs, 1.22 and 0.49 eV for the 16-finger SBDs, respectively. A low on-resistance of 5.71 and 3.58 Ω were obtained for 8-and 16-finger SBD at RT, respectively. The low series resistance induced by larger anode area of 16-finger SBDs results in a lower turn-on voltage of 0.47 V compared with that of 0.68 V for the 8-finger one. Besides, the temperature dependent current-voltage characteristics demonstrate that the TiN anode has a good temperature stability. And the temperature dependent performance of the 16-finger SBDs present a better uniformity than that of the 8-finger SBDs.

Abstract: The mechanism of threshold voltage shift was studied. It is believed that the instability in threshold voltage during gate bias stress is due to capture of electrons by the SiC/gate dielectric interface traps and the gate dielectric near interface traps. New experimental platform was designed and built successfully. When positive stress or negative stress is applied to the gate, the change of threshold voltage occur immediately. After stress removal, the recovery of the threshold voltage occur soon. The change and recovery of threshold voltage are very sensitive to time. In order to get accurate threshold voltage drift data after high-temperature gate bias experiment, test of threshold voltage must be carried out immediately after the experiment.

Abstract: In this paper the electrothermal properties of the 4H-SiC JBS (Junction barrier Schottky) diode is investigated. FloTHERM and Silvaco TCAD are used for electrothermal simulation at the same time. Firstly, the effect of R_jc (junction-to-case thermal resistance) on junction temperature is investigated, the result shows that the junction temperature is more sensitive to the R_jc in the current heating mode because of some kind of positive feedback. Then, a current pulse is applied to the JBS, result shows that this kind of positive feedback is especially noticeable. Finally, the JBS will be compared with PIN under high current density pulsed operation, in order to analyze their thermal sensitivity to R_jc.

Abstract: Even with SiC power MOSFETs released into the commercial market, the threshold voltage instability caused by near interface states is still an attracting issue, which is a major obstacle to further improving the device performance. In this paper, the effects of temperature storage on the threshold voltage stability of n-channel 4H-SiC VDMOSFET are studied. It is found that the capture of hole traps is dominant during the long-term temperature storage at 425 K, causing a considerable negative shift of threshold voltage. In view of the influence of temperature storage, the positive and negative drift trends of threshold voltage slow down during the gate-bias stress measurement. And the ∆V_TH, the difference between the threshold voltages recorded after positive and negative gate-bias stress in the same duration, also grows slowly with the increasing stress duration. Finally, some suggestions for improving the threshold reliability of n-channel SiC VDMOSFETs are presented.

Abstract: In this paper, an improved 4H-SiC trench-gate metal-oxide-semiconductor field effect transistors (UMOSFETs) structure with low on-resistance and reduced gate charge is proposed. The added n-type region in the improved structure reduces on-resistance of the device significantly while maintaining same breakdown voltage. The gate of the improved structure is designed as a p-n junction to reduce the gate-charge. The specific on-resistances of the improved 4H-SiC UMOSFETs is 1.87 mΩ.cm² at V_GS=18 V and V_DS=10 V, compared with 4.48 mΩ.cm² for the conventional p⁺ shielding UMOSFETs structure with same breakdown voltage. The on-resistance and figure of merit (FOM = V_BR²/R_on) improve by 58.3% and 103.6%, respectively. Compared with the conventional structure, the results show that gate-drain charge of the improved structure can be improved by 23.8%.

Abstract: In this paper, an optimized p⁺ shielding 4H-SiC trench-gate metal-oxide-semiconductor field effect transistors (UMOSFETs) structure with floating regions is proposed. The p⁺ shielding region is moved down to gain a low device on-resistance and the floating regions are designed to improve the breakdown voltage in the proposed structure. Specific on-resistances of the proposed 4H-SiC UMOSFETs is 2.62 mΩ.cm² at V_GS=18 V and V_DS=10 V, compared with 4.77 mΩ.cm² for the conventional p+ shielding UMOSFETs structure with same breakdown voltage. The on-resistance and figure of merit (FOM = V_BR²/R_on) improve by 45.1% and 94.2%, respectively.

Abstract: Silicon carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) has become the core device of power-switching converters with its excellent characteristics. An accurate and simple model of medium voltage SiC MOSFET is necessary for device evaluation, system design, and power converter efficiency prediction. This paper presents an equivalent circuit simulation behavior model, of which all parameters are abstracted from the datasheet, based on a three layers’ artificial neural network. The inputs are the gate voltage and the drain-source voltage, and the output is the drain current. In addition, the method of importing the neural network into circuit simulation software Pspice is discussed. The model is simple to create with no additional experiment, and is suitable for engineers at all stages to evaluate SiC MOSFET characteristics. The accuracy of the new model proposed in this paper has been verified by comparison with the data in the datasheet.

Abstract: In recent years, silicon carbide (SiC) and other wide band gap semiconductors have become one of the strategic commanding heights in the global high-technology field. Silicon Carbide (SiC) metal-oxide-semiconductor field effect transistor (MOSFET) has shown excellent electrical properties. When applying SiC MOSFET, the safe operation area (SOA) need to be considered. In this paper, the effect of circuit parameters on RBSOA of SiC MOSFET is researched. Firstly, the principle of RBSOA is introduced. Secondly, the equivalent circuit of the single-pulse test circuit is shown to study on the effect of gate resistance and gate voltage on RBSOA. Thirdly, the simulation of variable parameters are done to research the variation trend. Finally, experiments are done to verify the results which can make an important influence on safe operation of SiC MOSFET and help choose suitable circuit parameters.

Abstract: SiC heteropolytype structures indicate important applications in high frequency, large power solid devices etc. In this paper, the impact avalanche transit time (IMPATT) and mixed tunneling avalanche transit time (MITATT) diodes with heteropolytype consisting of two semiconductors among the 3C-SiC, 4H-SiC and 6H-SiC are numerically simulated to investigate the static state and small signal characteristics at the atmospheric window frequency of 1.56 THz. The breakdown voltage, avalanche voltage, peak value of static electric field, the maximum generation rates of avalanche and tunneling, power conversion efficiency, admittance-frequency relation of the proposed SiC heteropolytype diodes are calculated, respectively. Comparing the obtained parameters of IMPATT diodes with those of MITATT devices, the results imply that tunneling shows little influence on the small signal performance of the heteropolytype IMPATT diodes included 3C-SiC material, which is different from those of the homopolytype counterparts.