Effect of Temperature on the Electrical Characteristics of 4H-SiC Planar n/p-Type Junctionless FET: Physics Based Simulation

Pavan Vudumula; Siva Kotamraju

doi:10.4028/www.scientific.net/MSF.963.679

Paper Titles

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Effect of Temperature on the Electrical Characteristics of 4H-SiC Planar n/p-Type Junctionless FET: Physics Based Simulation
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Compact Modeling of SiC and GaN Junction FETs at High Temperature
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HomeMaterials Science ForumMaterials Science Forum Vol. 963Effect of Temperature on the Electrical...

Effect of Temperature on the Electrical Characteristics of 4H-SiC Planar n/p-Type Junctionless FET: Physics Based Simulation

Abstract:

In this paper, we have explored planar junctionless FET (JLFET) in 4H-SiC as a potential device for future industrial applications. We show the differences in static electrical characteristics (I_d-V_g, I_d-V_d, subthreshold current and I_on/I_off ratio) between n and p-type JLFETs whilst varying the lattice temperature (T) from 300 K to 700 K using 2D numerical simulations. The oxide-SiC interface traps have shown minimum influence on the device current conduction characteristics. For the same one-micron channel length and an equal area of cross-section, the p-type JLFET exhibits lower off-state current (I_off) leading to higher I_on/I_off ratio, a higher threshold voltage (V_TH) and lower subthreshold current in comparison to the n-type JLFET.

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Periodical:

Materials Science Forum (Volume 963)

Pages:

679-682

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.963.679

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Online since:

July 2019

Authors:

Pavan Vudumula, Siva Kotamraju*

Keywords:

I_on/I_off Ratio, Mobility, Sentaurus TCAD, SiC Junctionless FET

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