Reduced Particle Removal Efficiency Upon Wafer Storage

D. Martin Knotter; Romuald Roucou; Rémi Peyrin

doi:10.4028/www.scientific.net/SSP.145-146.61

Paper Titles

Cleaning Technique Using High-Speed Steam-Water Mixed Spray
p.43

Pattern Collapse and Particle Removal Forces of Interest to Semiconductor Fabrication Process
p.47

Applications of Electrostatic Spray Techniques to Surface Cleaning
p.51

Analyzing the Collapse Force of Narrow Lines Measured by Lateral Force AFM Using an Analytical Mechanical Model
p.55

Reduced Particle Removal Efficiency Upon Wafer Storage
p.61

Local Distribution of Particles Deposited on Patterned Surfaces
p.65

Particle Retention Mechanism of Filter in High Temperature Chemical
p.69

Improving Process Control for Copper Electroplating through Filter Membrane Optimization
p.73

Particle – Wafer Interactions in Semiaqueous Silicon Cleaning Systems
p.77

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Reduced Particle Removal Efficiency Upon Wafer Storage

Abstract:

Removal of particles from substrate wafers is one of the challenges in semiconductor industry. For this end, processes and equipment are developed using particle contaminated wafers. Preparation of these wafers differs from institute to institute, which makes it difficult to compare their cleaning performance results. The difference in behavior of differently prepared particle contaminated wafers is caused by the application method it self and the subsequent storage of these wafers after the particle application.