Scaling the 3D Bumps Pitch from 20 to 10 μm, Focusing on the Wet Cu Seed Etch Process Development

Samuel Suhard; A. Moussa; J. Slakkeboorn; F. Beirnaert; I. de Preter; F. Holsteyns

doi:10.4028/www.scientific.net/SSP.219.237

Paper Titles

TiN Metal Hardmask Residue Removal Formulation Development for Advanced Porous Low-K and Cu Interconnect Application
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Prevention of Unexpected Oxidation of Metal Layer by Removing Hydrogen Peroxide from Ultrapure Water and Diluted Hydrofluoric Acid
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Cost-of-Ownership Comparison of Single-Wafer Processes for Stripping Copper Pillar Bump Photomasks
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The Role of Mass Transfer in Removal of Cross-Linked Sacrificial Layers in 3DI Applications
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Scaling the 3D Bumps Pitch from 20 to 10 μm, Focusing on the Wet Cu Seed Etch Process Development
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Adhesion Improvement through Plasma Surface Treatments on Palladium Surface
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Control of HF Volatile Contamination in FOUP Environment by Advanced Polymers and Clean Gas Purge
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FOUP Material Influence on HF Contamination during Queue-Time
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Effect of FOUP Atmosphere Control on Process Wafer Integrity in Sub20 nm Device Fabrication
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HomeSolid State PhenomenaSolid State Phenomena Vol. 219Scaling the 3D Bumps Pitch from 20 to 10 μm,...

Scaling the 3D Bumps Pitch from 20 to 10 μm, Focusing on the Wet Cu Seed Etch Process Development

Abstract:

Within 3D stacked integrated circuits (3D-SIC), the fabrication of well-defined and solid microbumps is required. These bumps are typically being processed in presence of probing metal such as Al in order to stack functioning dies [1]. As a result of the variety of metals present and the continuous microbump downscaling towards 10 μm, more selective Cu seed etch chemistries are being screened. These Cu seed etch chemistries should be compatible with a variety of metals (Ni, Sn, Al, Co) and generate bumps without undercut and acceptable lateral etch (< 300 nm/side for 20 μm and < 150 nm/side for 10 μm). However the lateral etch specifications were just met for 20 μm [2] and will be more stringent for 10 μm, especially as the lateral etch specification are within the same range as the Cu seed layer thickness (150 nm). Additionally, the current seed etch process is yielding rough bumps (Rs >15 nm) whereas our target is set to be <12 nm in order to guarantee a good electrical contact.