Applied Mechanics and Materials Vols. 336-338

Abstract: The limited use lifetime is a significant drawback of the solid state disk (SSD). When the amount of bad blocks exceeds a threshold, the entire SSD is rendered non-functional as worn out. In this paper, we analysis the post life status of a SSD when its worn out and explain the endurance characteristic induced by Flash charge trap. The real achievable endurance is much more than the threshold endurance defined by the Flash chip manufacturers. Two methods are proposed to salvage the post life. The results show that the SSD could be used as a read-only disk or with the life time extended by 2X at most 6% user capacity penalty.

Abstract: The system completes the design of signal generator by using the technology of the Direct Digital Synthesizer (DDS). The DSP6713 designed as a key device, realizes outputting triangle wave and sine wave. The digital to analog (D/A) converter circuit is composed of AD768 and LTC1597, which helps improve the speed of converting and modulate the range of the output voltage by Digital Signal Processor (DSP), comparing with using one chip of D/A and proportional amplifier. In addition, bus topology makes extending system functions become easy. The system can be widely used in such field as communication, automatic control and instruments.

Abstract: A permanent magnet synchronous motor fuzzy control drive system based on field programmable gate array is proposed in this paper. This system has the high-precision control characteristic, which is hard for the traditional permanent magnet synchronous motor drive system to achieve. In this system a magnetic field oriented vector control with a zero excitation current is used, and three feedback loops consisting of current loop, velocity loop and position loop are used to build three fuzzy proportional integral controllers with fuzzy control method. The reliability and the dynamic of system performance can be improved by this method. The experimental results show that this system has advantages of high-precision control characteristic and enhancing the system robustness.

Abstract: This paper reports an 8-bit 1.72-Gsample/s TimeInterleaved analog-to-digital converter (TIADC) based on PCB with Field Programmable Gate Array (FPGA) technique. The system integrates two independent designed 8-bit 0.9-Gsample/s ADC chips in parallel, commercial FPGA and multi phase clock distributor circuit. In order to increase the systems performance, online calibration method is proposed to calibrate the mismatching errors in TIADC. The utilization of the FPGA is proven to be effective in removing the offset & gain mismatch; the clock distributor circuit is used as the time delay for each Sub-ADC chip to eliminate the sampling-time error. The hardware design features are also described in details. The ADC chip is fabricated in 0.35 um SiGe BiCMOS. Finally, experimental results reveal that the proposed system is capable to be operated up to 1.72GSps.Under this sampling frequency (1.72GHz), the system can achieve spurious free dynamic range (SFDR) which is larger than 40dBc. The effective code (ENOB) is lager than 5.5 bit from DC to Nyquist frequency and the power dissipation is 2.28 W.

Abstract: Based on the establishment of each independent phase theoretical model during synchronizing process of synchronizer used in HEV (hybrid electrical vehicle), an experimental means to analyze that synchronizing process is put forward in this article. Firstly, alternative current impedance analyzer is adopted to obtain amplitude and phase angle information of equivalent complex impedance between engaged gear ring and synchronizing ring. There are significant changes between the obtained results when the phase transition happens. Therefore, the moment of each phase transition can be determined through the experimental data. Then, to verify the consistency of the experiment mentioned above, a series of experiments are conducted under different rotation speed differences between the driving and driven cone. The experimental results show that different rotation speed differences lead to different moments when the severe mutation of amplitude and phase angle of the equivalent complex impedance occurs. It demonstrates the validity of the experiment that the rotation speed difference which belongs to phase transition criteria has a certain influence on the phase transition process. Furthermore, it is quite consistent with the actual situation, which also verifies that the experimental method put forward in this article has certain reliability.

Abstract: We give a proposal of smart home control system based on the Bluetooth to overcome the shortcomings of traditional smart home and meet the needs of the modern smart home. And we have already researched and designed an intelligent controller based on this control system. The intelligent controller uses ARM S3C6410 as processor, and the Bluetooth module use the CC2540 which conforms to the standard of Bluetooth 4.0. The intelligent controller use the Android as operating system, and the function of the smart home system is realized base on the controller.

Abstract: Power quality data interchange format PQDIF is proposed by IEEE. This paper references arc furnace load model based on energy balance relation theory, the distribution network was established based on PSCAD simulation model. By calculating the effective value of harmonic indicators as neural network input samples, we can establish the BP neural network model for training and testing. And then through the established BP neural network model, it can realize the non-linear relation between the harmonic disturbance source and the harmonic indicators, thus the harmonic disturbance source orientation is achieved successfully.

Abstract: This paper presents a pipelined RISC architecture processor. Five-stage pipeline is used to enhance the performance. Test results show that: the design of processor able to accurately perform all instructions, reaching the functional requirements, and greatly improved performance. Finally, implement the pipelined RISC processor in FPGA.

Abstract: In this paper, grid multi-scroll chaotic attractors are firstly generated. The maximum Lyapunov exponent is further calculated to prove the existence of chaos in designed system. An improved module-based circuit is designed for realizing 5×3 grid scroll chaotic attractors, and the experimental results are also obtained, which is consistent with the numerical simulations.

Abstract: the software and hardware design methods of energy substation in the enterprise energy management system are as follows: to use AM3359 ARM microcontroller as the CPU of energy substation; to use 8 circuits 24-bit ADC to survey the signals of pressure, temperature, and flow rate, etc; to use 4 circuits 16-bit DAC to control the on-site equipments and to communicate with central monitoring site through Ethernet.