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Investigation of Advanced Hexagonal Layouts for 650 V SiC MOSFETs
Abstract:
A set of novel features for the planar gate SiC MOSFETs with the hexagonal unit cell were investigated in terms of the R DS,ON and reliability (HTRB/HTGB) perspectives. The fabricated SiC MOSFETs with the proposed features improved the R DS,ON by 9~14% compared to the SiC MOSFETs with the conventional striped unit cell. From the R DS,ON temperature coefficient perspective (RT Vs. 150°C), the SiC MOSFETs with the proposed features were close to the same counterpart with the marginal difference of ~2%. The SiC MOSFETs with the proposed features showed tighter R DS,ON and I D,SS spatial distributions in comparison to the SiC MOSFETs without the proposed features. Two batches of the SiC MOSFETs with select feature were tested for HTRB under the over-stressed conditions. One batch passed the 1,000hr HTRB test and another batch had one I D,SS failure at 600hr with no further failure up until 1,000hr.
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39-46
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September 2025
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