Fast High Current Sensing SMD Resistor Network Layout for Low Inductance Insertion

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This work presents simple layout configurations for current sensing resistor networks to measure fast and high currents in SiC devices. The proposed layout reduces the inserted inductance in the switching loop when compared to coaxial shunts, which is key for the application of SiC devices in space. High inductance in the switching loop leads to dangerous overshoots during turn-off transients, that can block the adoption of SiC devices in space due to single event burnouts. After presenting the different proposed layouts, the inserted inductance of each one is measured with an impedance analyzer as well as performing switching tests. Applying field cancellation techniques in the layout of a simple parallel resistor network, the inserted inductance is reduced up to 17.6 % when compared to a coaxial shunt, while obtaining the same current sensing performance.

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65-70

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September 2025

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