Cost-Effective Design and Optimization of a 3300-V Semi-Superjunction 4H-SiC MOSFET Device

Article Preview

Abstract:

This study investigates a cost-effective semi-Superjunction (SSJ) solution for 3.3 kV silicon carbide (SiC) MOSFETs, comparing planar and trench configurations. The semi-SJ method, utilizing side-wall implantation and silicon oxide trench refill, offers a practical alternative to the more complex multi-epitaxial growth approach. Through TCAD simulations, the planar semi-SJ MOSFET (planar-SSJ) achieved a 48 % reduction in specific on-state resistance (7.5 mΩ.cm2) and a 4.5 % improvement in maximum blocking voltage (4210 V) compared to conventional planar MOSFET. The trench semi-SJ MOSFET (trench-SSJ), depending on the deep trench angle, can further reduce the specific on-state resistance by 52 % (7.0 mΩ.cm2) and improve the maximum blocking voltage by 6 % (4285 V), while also providing a wider implantation window and a lower gate-oxide electric field.

You have full access to the following eBook

Info:

* - Corresponding Author

[1] G. W. C. Baker et al., "Optimization of 1700-V 4H-SiC Semi-Superjunction Schottky Rectifiers With Implanted P-Pillars for Practical Realization," in IEEE Transactions on Electron Devices, 2022.

DOI: 10.1109/ted.2022.3152460

Google Scholar

[2] X. Zhong, B. Wang and K. Sheng, "Design and experimental demonstration of 1.35 kV SiC super junction Schottky diode," 2016 28th International Symposium on Power Semiconductor Devices and ICs (ISPSD).

DOI: 10.1109/ispsd.2016.7520820

Google Scholar

[3] K. Melnyk et al., "3.3 kV 4H-SiC Trench Semi-Superjunction Schottky Diode With Improved ON-State Resistance," in IEEE Transactions on Electron Devices, 2024.

DOI: 10.1109/ted.2024.3435181

Google Scholar

[4] M. Baba, T. Tawara, T. Morimoto, S. Harada, M. Takei and H. Kimura, "Ultra-Low Specific on-Resistance Achieved in 3.3 kV-Class SiC Superjunction MOSFET," 2021 33rd International Symposium on Power Semiconductor Devices and ICs (ISPSD).

DOI: 10.23919/ispsd50666.2021.9452273

Google Scholar

[5] S. Harada et al., "First Demonstration of Dynamic Characteristics for SiC Superjunction MOSFET Realized using Multi-epitaxial Growth Method," 2018 IEEE International Electron Devices Meeting (IEDM), 2018.

DOI: 10.1109/iedm.2018.8614670

Google Scholar

[6] K. Melnyk et al., "Design and Optimization of 3.3 kV Silicon Carbide Semi-Superjunction Schottky Power Devices," 2024 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Bremen, Germany, 2024.

DOI: 10.1109/ispsd59661.2024.10579567

Google Scholar

[7] X. Chen et al., "Different JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs," in IEEE Journal of the Electron Devices Society, 2020.

DOI: 10.1109/jeds.2020.3010951

Google Scholar

[8] H. Kono et al., "3.3 kV all SiC MOSFET module with Schottky barrier diode embedded SiC MOSFET," PCIM Europe Conference, 2021.

Google Scholar

[9] S. Yu, M. H. White and A. K. Agarwal, "Experimental Determination of Interface Trap Density and Fixed Positive Oxide Charge in Commercial 4H-SiC Power MOSFETs," in IEEE Access, 2021.

DOI: 10.1109/access.2021.3124706

Google Scholar