650V Vertical SiC MOSFETs and Diodes with Improved Terrestrial-Neutron Single-Event Burnout

Daniel J. Lichtenwalner; Satyaki Ganguly; Brian Fetzer; Callie Woods; Donald A. Gajewski; Sei Hyung Ryu; Brett Hull; Scott Allen; John W. Palmour

doi:10.4028/p-0uzrgt

Paper Titles

Impact of Dimensions and Doping on the Breakdown Voltage of a Trench 4H-SiC Vertical JFET
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Early Burn-In Parasitic Conduction in 500 °C Durable SiC JFET ICs
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Optimization of TaSi₂ Processing for 500 °C Durable SiC JFET-R Integrated Circuits
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High Density 65W AC-DC Adaptor Enabled by SiC MOSFET with Ultralow V_GS(on)
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650V Vertical SiC MOSFETs and Diodes with Improved Terrestrial-Neutron Single-Event Burnout
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Investigations on 4H-SiC Low Voltage nMOSFETs with Thin Thermal SiO₂/ Deposited Oxide Gate Dielectric
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Reduction of Forward Bias Degradation in 4H-SiC PiN Diodes Fabricated on 4H-SiC Bonded Substrates
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Evaluation of the Alkali-Aggregate Reaction Mitigation Potential of Alkali-Activated Fly Ash-Based Matrices Containing Different Reactive Aggregates
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Determination of Elastic Constants of Cross-Laminated Bamboo (CLB) through Non-Destructive Testing
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HomeKey Engineering MaterialsKey Engineering Materials Vol. 948650V Vertical SiC MOSFETs and Diodes with Improved...

650V Vertical SiC MOSFETs and Diodes with Improved Terrestrial-Neutron Single-Event Burnout

Abstract:

Silicon carbide (SiC) power devices such as Schottky diodes and metal-oxide semiconductor field-effect transistors (MOSFETs) are susceptible to failure by terrestrial neutron single-event burnout (SEB) while in the high-voltage blocking state. In this study the effects of the drift layer design of 650V SiC vertical power diodes and MOSFETs have been studied. TCAD simulations of different device designs have been performed, and fabricated device single-event burnout (SEB) properties are compared between the devices fabricated. We find that the standard 650V devices have a low area-scaled failure-in-time (FIT/cm²) such that essentially no failures (0.01 FIT/cm²) are expected at 400V drain-source bias (V_DS) operation and below. An improved design allows the SEB failure rate curve to be shifted downward in failure rate, such that at for a given V_DS operation condition, the FIT/cm² can be decreased by 10 - 100 times, depending on the V_DS value. This allows operation at about 75V higher V_DS value with a similar SEB failure rate, allowing these devices to be used in a wider range of applications.

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Periodical:

Key Engineering Materials (Volume 948)

Pages:

95-99

DOI:

https://doi.org/10.4028/p-0uzrgt

Citation:

Cite this paper

Online since:

June 2023

Authors:

Daniel J. Lichtenwalner*, Satyaki Ganguly, Brian Fetzer, Callie Woods, Donald A. Gajewski, Sei Hyung Ryu, Brett Hull, Scott Allen, John W. Palmour

Keywords:

Cosmic Ray Failure, Diode, MOSFET, Silicon Carbide (SiC), Single-Event-Burnout (SEB)

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Creative Commons CC BY 4.0

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* - Corresponding Author

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