Evaluation of Suppressing Forward Voltage Degradation by Using a Low BPD Density Substrate or an Epitaxial Wafer with an HNDE

Yoshitaka Nishihara; Koji Kamei; Kenji Momose; Hiroshi Osawa

doi:10.4028/www.scientific.net/MSF.1004.439

Paper Titles

TEM Studies on the Microstructure of m-Face Grown 4H-SiC by Solution Growth
p.414

Structural Characterization of Prismatic Stacking Faults of Two Types of Carrot Defects in 4H-SiC Epi Wafers
p.421

Formation of Double Shockley Stacking Faults in Heavily Nitrogen Doped 4H-SiC Crystal with Reduction of Residual Stress around Scratch Damage
p.427

Nanoscale Insights on the Origin of the Power MOSFETs Breakdown after Extremely Long High Temperature Reverse Bias Stress
p.433

Evaluation of Suppressing Forward Voltage Degradation by Using a Low BPD Density Substrate or an Epitaxial Wafer with an HNDE
p.439

Crystalline Quality Evaluation of SiC p/n Column Layers Formed by Trench-Filling-Epitaxial Growth
p.445

Investigation of Dislocations Inducing Leakage Current on SiC Junction Barrier Schottky Diode by Two-Photon-Excited Band-Edge Photoluminescence
p.451

Statistical Analysis of Killer and Non-Killer Defects in SiC and the Impacts to Device Performance
p.458

Investigation of Bipolar Degradation of 1.2 kV BJTs under Different Current and Temperature Conditions
p.464

HomeMaterials Science ForumMaterials Science Forum Vol. 1004Evaluation of Suppressing Forward Voltage...

Evaluation of Suppressing Forward Voltage Degradation by Using a Low BPD Density Substrate or an Epitaxial Wafer with an HNDE

Abstract:

Forward voltage degradation is a crucial problem that must be overcome if we are to fabricate a metal-oxide semiconductor field-effect transistor (MOSFET) including a pin diode (PND) as a body diode in a silicon carbide (SiC). Previously, the basal plane dislocation (BPD) in a SiC substrate have been reduced to suppress bipolar degradation. On the other hand, an highly N-doped epilayer (HNDE) was recently fabricated that enhances the minority carrier recombination before the carrier arrives at the substrate. Although both approaches can reduce the V_f shift caused by the degradation, they should be used under different substrate conditions. When a substrate with a high BPD density is used for epitaxial growth, an HNDE is needed to realize a high-quality epitaxial wafer; however, the HNDE should not be formed on a substrate with a low BPD density.

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Materials Science Forum (Volume 1004)

Pages:

439-444

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.1004.439

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Online since:

July 2020

Authors:

Yoshitaka Nishihara*, Koji Kamei, Kenji Momose, Hiroshi Osawa

Keywords:

4H-SiC, Basal Plane Dislocations, Forward Voltage Degradation, Highly N-Doped Epilayer

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