SiC Diode with Vertical Superjunction Realized Using Channeled Implant and Multi-Step Epitaxial Growth

Roman Maloušek; Jan Chochol; Hrishikesh Das; Swapna Sunkari; Joshua Justice; Krister Gumaelius; Jimmy Franchi; Martin Domeij; Fredrik Allerstam; Ryota Wada; Takashi Kuroi

doi:10.4028/p-ix1o7m

Paper Titles

Multi-Layer High-K Gate Stack Materials for Low D_it 4H-SiC Based MOSFETs
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Electrothermal Modelling and Measurements of Parallel-Connected V_THMismatched SiC MOSFETs under Inductive Load Switching
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Advanced 1200V SiC MOSFET Concept Based on Singular Point Source MOS (S-MOS) Technology
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Failure Analysis of Atmospheric Neutron-Induced Single Event Burnout of a Commercial SiC MOSFET
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SiC Diode with Vertical Superjunction Realized Using Channeled Implant and Multi-Step Epitaxial Growth
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Pulsed Forward Bias Body Diode Stress of 1700 V SiC MOSFETs with Individual Mapping of Basal Plane Dislocations
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Determination of Effective Critical Breakdown Field in 4H-SiC Superjunction Devices
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Comparative Performance Evaluation of Conventional and Superjunction Vertical 4H-SiC High-Voltage Power MOSFETs
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Edge Terminations for 4H-SiC Power Devices: A Critical Issue
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HomeMaterials Science ForumMaterials Science Forum Vol. 1062SiC Diode with Vertical Superjunction Realized...

SiC Diode with Vertical Superjunction Realized Using Channeled Implant and Multi-Step Epitaxial Growth

Abstract:

This work details two approaches with multi-epitaxial growth to create a vertical superjunction structure made of alternating pillars. One approach is a chain of very high energy implants, the other uses a preferred implantation direction to achieve a channeled profile. The manufactured devices show a breakdown voltage of 1000 V for channeled, two-step epi with total 4.9 μm thickness. 800 V for regular high energy implants using three epi steps of total 3.7 μm thickness. The measured Rsp was 0.7 mOhm*cm² for dies with size 0.018 cm². UIS and temperature measurement show reliable performance. The channeled implant looks favorable to reduce the number of process steps needed to create an efficient superjunction structure.

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Silicon Carbide and Related Materials 2021

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Periodical:

Materials Science Forum (Volume 1062)

Pages:

549-553

DOI:

https://doi.org/10.4028/p-ix1o7m

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Online since:

May 2022

Authors:

Roman Maloušek*, Jan Chochol, Hrishikesh Das, Swapna Sunkari, Joshua Justice, Krister Gumaelius, Jimmy Franchi, Martin Domeij, Fredrik Allerstam, Ryota Wada, Takashi Kuroi

Keywords:

Channeled Implant, Charge Balance, Epitaxy, Silicon Carbide, Superjunction, UIS

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* - Corresponding Author

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