Pulsed Forward Bias Body Diode Stress of 1700 V SiC MOSFETs with Individual Mapping of Basal Plane Dislocations

Abstract:

In this work, body diode stress has been carried out for 1700 V 25 mΩ planar SiC MOSFETs. The epitaxial wafers were mapped with Infra-Red photoluminescence (IR-PL) to determine and localize the exact number of basal plane dislocations present in the drift layers of each die. The SiC MOSFETs were then packaged in groups with individual BPD counts in different bins ranging from 0 up to more than 30 per device. Pulsed body diode measurements with high currents of 250-400 A (about 1000-1600 A/cm²) were then performed with electrical characterization before and after to check for drift in key electrical parameters. Significantly increased R_DSon was found after high current stress from about 300 A for devices with BPDs. A physical analysis of the degraded devices by backside electroluminescence show the presence of several trapezoid-shaped patterns indicating the occurrence of bipolar degradation.

• Periodical: Materials Science Forum (Volume 1062)
• Pages: 554-559
• DOI: https://doi.org/10.4028/p-nc73ur
• Online since: May 2022
• Authors: Sara Kochoska*, Martin Domeij, Swapna Sunkari, Joshua Justice, Hrishikesh Das, Thanh Toan Pham, Jimmy Franchi, Sotirios Maslougkas, Ho Jung Lee, Xue Qing Hu, Thomas Neyer
• Keywords: Basal Plane Dislocation (BPD), Bipolar Degradation, Body Diode Stress, SiC, Stacking Fault

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