Materials Science Forum Vol. 1159

Abstract: This paper reports on the effect of a sulfurization thermal process of the silicon carbide surface on the properties of Ni/4H-SiC Schottky barrier. In particular, the incorporation of sulfur (S) in the 4H-SiC near-surface region was observed at the process performed at 800 °C, without any significant effect on the surface morphology. On the other hand, Ni/4H-SiC Schottky contacts fabricated on the sulfurized 4H-SiC surface showed a 0.3 eV reduction of the average barrier height with a narrower distribution, with respect to the untreated sample. These results were explained by an increase of the 4H-SiC electron affinity after sulfurization, and a Fermi level pinning effect.

Abstract: This study focuses on analyzing the electrical performance and characteristics of Schottky Barrier Diodes (SBDs) on the carbon face (C-face) epitaxial layer. The C-face epitaxial layer is grown on monocrystalline 4H-SiC and has a thickness of ~ 11 μm. It displayed minimal surface roughness, with an R_q of ~ 0.3 nm. The C-face termination epitaxy was examined using grazing-angle X-ray photoelectron spectroscopy (XPS) analysis. SBDs were fabricated using a Ti/Al metal stack. Schottky Barrier Height (Φ_B) of about 1.2 eV was extracted from I-V measurements. Temperature-dependent I-V measurements demonstrated a forward voltage decrease as the temperature rises when the forward current is < 1 μA. However, for forward currents > 1 μA, the forward voltage increases with temperature. This rise in forward voltage could lead to a reduction in reverse recovery time and thus enhancing the switching speed. Additionally, the diode exhibits remarkable immunity to reverse leakage current up to 200 °C, surpassing the performance of the 6.5 kV JBS diode on Si-face 4H-SiC [1].

Abstract: This study investigates the role of ultra-thin conductive Indium-Tin-Oxide (ITO) as an interlayer at the Metal-SiC (MS) junction to lower the overall specific contact resistance (SCR) for source drain metallization applications on n-type 4H-SiC substrates. In this work, we demonstrate an improvement in SCR by 1 order of magnitude from ~10^-6 Ω∙cm² to 10^-7 Ω∙cm² through the integration of an ultra-thin ITO interlayer. Barrier height (Φ_B) lowering by ~ 0.1 eV was observed at the MS interface as deposited which could have assisted in the reduction of the SCR. Titanium-based Ohmic contacts were subsequently formed at 950 °C. Various thicknesses of ITO were examined to assess their influence on the formation of ohmic contacts to n-type SiC. An SCR (ρ_c) of 6.9×10^-7 Ω∙cm² was achieved through integration of an ultra-thin conductive ITO interlayer at the MS interface.

Abstract: This study focuses on the trench etching process for the fabrication of SiC Superjunction Schottky diodes, utilizing an ICP-RIE technique. Through a series of experiments, we optimized the etching parameters, including ICP power, RF power, and SF₆ gas flow rates, to achieve etching rates ranging from 157 nm/min to 372.1 nm/min. Additionally, the study identified the performance of the hard mask as a critical issue during the etching process, which was improved by reducing the RF power below 80 w. The deepest trench achieved reached a depth of 21 μm at 75 w RF power, 1000 w ICP power and 40 sccm SF₆, confirming the feasibility of this approach for fabricating high-performance SiC superjunction devices.

Abstract: Laser Thermal Annealing (LTA) is a necessary fabrication step to improve the 4H-SiC devices by reducing their ON-state resistance. Because the LTA annealing is achieved at the end of the front-end fabrication, the classical Radio Corporation of America cleaning (RCA) cannot be used without affecting the material deposited on the frontside. Therefore, in this study, we investigate the argon (Ar) plasma surface treatment, achieved in our sputtering tool, before the ohmic contact fabrication, as an alternative surface preparation to the RCA sequence. As the Ar plasma modifies the SiC surface morphology, it affects its wetting properties. That can play a key role in the ohmic contact formation by LTA since the nickel turns into liquid phase during the laser irradiation. For an Ar plasma treatment of 30 min, a specific contact resistance of 5.0×10^-5 Ω.cm² has been obtained for an annealing at 5.0 J.cm², which is in the same range than the contact fabricated by LTA involving a classical RCA cleaning.

Abstract: In this paper, various annealing conditions using Al-based (Ti/Al/Ti/Au=70nm/100nm /5nm/120nm) and Ni-based (Ti/Ni/Ti/Au=20nm/90nm/5nm/120nm) metal contacts to n-type and p-type ion-implanted 4H-SiC epi layers have been studied in the effort to optimize simultaneous ohmic contact formation with the lowest specific contact resistance (SCR) values. Values of 1.091×10^-4 Ω∙cm² and 1.158×10^-5 Ω∙cm² were achieved using Al-based Ohmic metal contacts for p-type and n-type 4H-SiC, respectively, at an annealing temperature of 950°C and under vacuum for 90 sec. Ohmic formation mechanisms were analyzed using the X-Ray Diffraction (XRD) surface analysis method, indicating Ti₃SiC₂ alloys to be the key intermediate layer formed at SiC/Ti interface, responsible for Ohmic properties to p-type SiC. The paper summarizes the metal process combinations possible for the formation of Ohmic contacts to both n-type and p-type 4H-SiC, offering various options in either using the same metal materials and/or common annealing conditions.

Abstract: In this work, a comparison of standard bulk 4H-SiC epi wafers and Soitec's SmartSiC™ wafers as well as the influence of RTA processing was conducted. For this, MOS capacitors were processed using thermal gate oxide paired with a polycrystalline gate electrode. Subsequent High temperature steps were avoided until an RTA process was performed on some of these wafers. To investigate the oxide quality on all wafer and process splits, CV-, time-zero dielectric breakdown and constant-current stress time-dependent dielectric breakdown measurements were carried out. For the examination of bulk wafers and SmartSiC™, no relevant differences in terms of yield, oxide quality, interface state density and reliability were found. In contrast, RTA processes seem to create a shift in flat band voltage and also lead to a reduction in oxide lifetime. The V_FB shift could partially, but not completely, be explained by addition activation of dopants in the polysilicon electrode. The influence on the oxide reliability, however, is still unclear.

Abstract: Low-process damage dicing technologies are required to improve the reliability of silicon carbide (SiC) devices. Existing methods, such as ultrasonic diamond blade dicing, dry laser dicing, and stealth dicing, introduce mechanical or thermal stresses that lead to cracks and dislocations, including basal plane dislocations (BPDs), which degrade device quality. In this study, we assess the crystalline defects induced by water jet guided laser (WGL) processing on a SiC wafer using X-ray topography (XRT) and investigate the underlying processing mechanisms through Energy Dispersive X-ray Spectroscopy (EDX). The asymmetric contrast observed along the processed grooves in the XRT images was due to the X-ray irradiation direction, and no significant BPD formation was observed. The EDX results showed that the processed surface was oxidized by laser ablation. Thus, WGL processing can provide damage-free dicing of SiC wafers with minimal mechanical stress and defects.

Abstract: In this work, a method is presented to form structured low-ohmic p-type contacts on Al-implanted 4H-SiC by laser annealing. A metal layer sequence for p-type contacts suitable for UV laser treatment was developed. Furthermore, a method to protect thermosensitive layers from damages by laser treatment is presented. By structuring the top metallization layer, it is possible to use the metal stack as a self-aligned mask. That makes it possible to laser the entire surface of the wafer, whereby thermosensitive layers are protected from damages by laser annealing by utilizing the optical properties of the individual metal layers. To evaluate the method, TLM structures were electrically characterized. TLM structures were electrically characterized successfully demonstrating the feasibility of the presented approach.