Optimum Design of Short-Channel 4H-SiC Power DMOSFETs
We describe an optimized design for the 1 kV short-channel 4H-SiC power DMOSFET, obtained from numerical simulations using the Taguchi method. Three new structural features are employed: (1) a current spreading layer (CSL) below the p-well, (2) a heavily-doped, narrow JFET region, and (3) a segmented p-well contact.
Robert P. Devaty, David J. Larkin and Stephen E. Saddow
A. Saha and J. A. Cooper, "Optimum Design of Short-Channel 4H-SiC Power DMOSFETs", Materials Science Forum, Vols. 527-529, pp. 1269-1272, 2006