Improved Dielectric and Interface Properties of 4H-SiC MOS Structures Processed by Oxide Deposition and N₂O Annealing

Abstract:

Oxide deposition followed by high-temperature annealing in N2O has been investigated to improve the quality of 4H-SiC MOS structures. Annealing of deposited oxides in N2O at 1300oC significantly enhances the breakdown strength and decreases the interface state density to 3x1011 cm-2eV-1 at EC – 0.2 eV. As a result, high channel mobility of 34 cm2/Vs and 52 cm2/Vs has been attained for inversion-type MOSFETs fabricated on 4H-SiC(0001)Si and (000-1)C faces, respectively. The channel mobility shows a maximum when the increase of oxide thickness during N2O annealing is approximately 5 nm. A lateral RESURF MOSFET with gate oxides formed by the proposed process has blocked 1450 V and showed a low on-resistance of 75 m
cm2, which is one of the best performances among lateral SiC MOSFETs reported.

• Periodical: Materials Science Forum (Volumes 527-529)
• Pages: 987-990
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.527-529.987
• Online since: October 2006
• Authors: Tsunenobu Kimoto, H. Kawano, Masato Noborio, Jun Suda, Hiroyuki Matsunami
• Keywords: Channel Mobility, Chemical Vapor Deposition (CVD), MOS, Nitridation, RESURF MOSFET

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