The Effects of Phosphorus at the SiO2/4H-SiC Interface

Yogesh K. Sharma; Ayayi Claude Ahyi; Tamara Issacs-Smith; Xiao Shen; Sokrates T. Pantelides; Xing Guang Zhu; John Rozen; Leonard C. Feldman; John R. Williams; Yi Xu; Eric Garfunkel

doi:10.4028/www.scientific.net/MSF.717-720.743

Paper Titles

Effect of Direct Nitridation of 4H-SiC Surface on MOS Interface States
p.725

Improved Deposited Oxide Interfaces from N₂Conditioning of Bare SiC Surfaces
p.729

Development of 4H-SiC MOSFETs with Phosphorus-Doped Gate Oxide
p.733

Effect of POCl₃ Annealing on Reliability of Thermal Oxides Grown on 4H-SiC
p.739

The Effects of Phosphorus at the SiO₂/4H-SiC Interface
p.743

SiO₂/SiC Interfacial Region: Presence of Silicon Oxycarbides and Effects of Hydrogen Peroxide and Water Vapor Thermal Treatments
p.747

Improvement in the SiO₂/4H-SiC Interfacial Region by Thermal Treatments with Hydrogen Peroxide
p.753

Electron Trapping in 4H-SiC MOS Capacitors Fabricated by Sodium-Enhanced Oxidation
p.757

Passivation and Depassivation of Interface Traps at the SiO₂/4H-SiC Interface by Potassium Ions
p.761

HomeMaterials Science ForumMaterials Science Forum Vols. 717-720The Effects of Phosphorus at the SiO2/4H-SiC...

The Effects of Phosphorus at the SiO₂/4H-SiC Interface

Abstract:

Phosphorous passivation of the SiO2/4H-SiC interface lowers the interface trap density and increases the field effect mobility for n-channel MOSFETs to twice the value of 30-40cm2/V-s obtained using standard NO nitridation. Passivation using P2O5 introduced with an SiP2O7 planar diffusion source (PDS) converts the oxide layer to phosphosilicate glass (PSG) which is a polar material. BTS (bias‐temperature‐stress) measurements with MOS capacitors and FETs show that the benefits of reduced interface trap density and increased mobility are offset by unstable flat band and threshold voltages. This instability can be removed by etching away the PSG oxide and depositing a replacement SiO2 layer. However, trap densities for etched MOS capacitors are "NO-like" (i.e., higher), which would lead one to expect a lower mobility if MOSFETs are fabricated with the PSG / etch / deposited oxide process.