Design of Area-Efficient, Robust and Reliable Junction Termination Extension in SiC Devices

Alexander Bolotnikov; Peter A. Losee; Peter Deeb; Meng Li Wang; Greg Dunne; James Kretchmer; Stephen Arthur; Ljubisa Stevanovic

doi:10.4028/www.scientific.net/MSF.858.737

Paper Titles

Etching Rate Behavior of 4H-Silicon Carbide Epitaxial Film Using Chlorine Trifluoride Gas
p.715

Development of “Si-Vapor Etching” and “Si Vapor Ambient Anneal” in TaC/Ta Composite Materials
p.719

Novel 3C-SiC Microstructure for MEMS Applications
p.723

Study of 4H-SiC Junction Barrier Schottky(JBS) Diode Using Various Junction Structures
p.733

Design of Area-Efficient, Robust and Reliable Junction Termination Extension in SiC Devices
p.737

Modeling of Inhomogeneous 4H-SiC Schottky and JBS Diodes in a Wide Temperature Range
p.741

Optimum Design of 4H-SiC Junction Barrier Schottky Diode with Consideration of the Anisotropic Impact Ionization
p.745

Anomalous Scatter of Forward Current-Voltage Characteristics of He⁺-Irradiated Ni/4H-SiC Schottky Diodes
p.749

Epitaxial Layer Thickness Dependence on Heavy Ion Induced Charge Collection in 4H-SiC Schottky Barrier Diodes
p.753

HomeMaterials Science ForumMaterials Science Forum Vol. 858Design of Area-Efficient, Robust and Reliable...

Design of Area-Efficient, Robust and Reliable Junction Termination Extension in SiC Devices

Abstract:

This paper discusses SiC JTE design tradeoffs required to maximize device performance while minimizing consumed die area, fabrication cost and maintaining good reliability. Modeling and experimental results are provided.

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Periodical:

Materials Science Forum (Volume 858)

Pages:

737-740

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.858.737

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Online since:

May 2016

Authors:

Alexander Bolotnikov*, Peter A. Losee, Peter Deeb, Meng Li Wang, Greg Dunne, James Kretchmer, Stephen Arthur, Ljubisa Stevanovic

Keywords:

High Voltage, Junction Termination Extension (JTE), Silicon Carbide (SiC)

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