Dynamic Characterization of the Threshold Voltage Instability under the Pulsed Gate Bias Stress in 4H-SiC MOSFET

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Abstract:

The threshold voltage (Vth) instability of 4H-SiC MOSFETs was investigated using high-speed IV measurement instrument. DC stress measurement of wide time span ranging from 10-6 to 103 s without relaxation effect was conducted. The high-speed measurement allowed of dynamic ΔVth measurement under pulsed AC gate bias stress. We investigated effects of NO POA in gate oxidation process on the Vth instabilities.

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549-552

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May 2017

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© 2017 Trans Tech Publications Ltd. All Rights Reserved

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[1] M. Okamoto, Y. Makifuchi, M. Iijima, Y. Sakai, N. Iwamuro, H. Kimura, K. Fukuda, H. Okumura, Appl. Phys. Express 5 (2012) 041302.

DOI: 10.1143/apex.5.041302

Google Scholar

[2] T. Okayama, S. D. Arthur, J. L. Garrett, M. V. Rao, Solid-State Electron., 52 (2008) 164-170.

Google Scholar

[3] A. J. Lelis, R. Green, D. B. Habersat, M. El, IEEE Trans. Electron Devices 62 (2015) 316-323.

Google Scholar

[4] K. Zhao, J. H. Stathis, B. P. Linder, E. Cartier, Proc. Int. Rel. Phys. Symp. (2011) 4A. 3. 1-4A. 3. 9.

Google Scholar

[5] H. Reisinger, T. Grasser, W. Gustin, C. Schlünder, Proc. Int. Rel. Phya. Symp. (2010) 2A. 1. 1-2A. 1. 9.

Google Scholar

[6] F. P. Heiman, G. Warfield, IEEE trans. Electron Devices ED-12 (1965) 167-178.

Google Scholar

[7] M. Denais, A. Bravaix, V. Huard, C. Parthasarathy, G. Ribes, F. Perrier, Y. Rey-Tauriac, N. Revil, IEDM (2004) 109-112.

DOI: 10.1109/iedm.2004.1419080

Google Scholar

[8] M. Sometani, D. Okamoto, S. Harada, H. Ishimori, S. Takasu, T. Hatakeyama, M. Takei, Y. Yonezawa, K. Fukuda, H. Okumura, Jpn. J. Appl. Phys. 55 (2016) 04ER11.

DOI: 10.7567/jjap.55.04er11

Google Scholar