Prolonged 500°C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

David J. Spry; Philip G. Neudeck; Dorothy Lukco; Liang Yu Chen; Michael J. Krasowski; Norman F. Prokop; Carl W. Chang; Glenn M. Beheim

doi:10.4028/www.scientific.net/MSF.924.949

Paper Titles

Electrical Properties of Schottky-Diodes Based on B Doped Diamond
p.931

Electric Field Characterization of Diamond Metal Semiconductor Field Effect Transistors Using Electron Beam Induced Current
p.935

Analysis of Zr_xSi_yO_z as High-k Dielectric for 4H-SiC MOSFETs
p.939

Electrochemical Formation of Porous Silicon Carbide for Micro-Device Applications
p.943

Prolonged 500°C Operation of 100+ Transistor Silicon Carbide Integrated Circuits
p.949

Design and Simulation of Bipolar 4H-SiC Memory Architecture for High Temperature Applications
p.953

Electrical Characterization of Integrated 2-Input TTL NAND Gate at Elevated Temperature, Fabricated in Bipolar SiС-Technology
p.958

Inclusion of Body Bias Effect in SPICE Modeling of 4H-SiC Integrated Circuit Resistors
p.962

High Temperature Behavior Prediction Techniques for Non-Uniform Ni/SiC Schottky Diodes
p.967

HomeMaterials Science ForumMaterials Science Forum Vol. 924Prolonged 500°C Operation of 100+ Transistor...

Prolonged 500°C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

Abstract:

This report describes more than 5000 hours of successful 500 °C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 °C. After 100 hours of 500 °C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 °C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460 °C in comparison to what is observed for Earth-atmosphere oven testing at 500 °C.

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Periodical:

Materials Science Forum (Volume 924)

Pages:

949-952

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.924.949

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Online since:

June 2018

Authors:

David J. Spry, Philip G. Neudeck*, Dorothy Lukco, Liang Yu Chen, Michael J. Krasowski, Norman F. Prokop, Carl W. Chang, Glenn M. Beheim

Keywords:

High Temperature, Integrated Circuit (IC), JFET, Random Access Memory, Venus

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References

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