Low-Parasitic-Capacitance Self-Aligned 4H-SiC nMOSFETs for Harsh Environment Electronics

Tatsuya Kurose; Shin Ichiro Kuroki; Seiji Ishikawa; Tomonori Maeda; Hiroshi Sezaki; Takahiro Makino; Takeshi Ohshima; Mikael Östling; Carl Mikael Zetterling

doi:10.4028/www.scientific.net/MSF.924.971

Paper Titles

Design and Simulation of Bipolar 4H-SiC Memory Architecture for High Temperature Applications
p.953

Electrical Characterization of Integrated 2-Input TTL NAND Gate at Elevated Temperature, Fabricated in Bipolar SiС-Technology
p.958

Inclusion of Body Bias Effect in SPICE Modeling of 4H-SiC Integrated Circuit Resistors
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High Temperature Behavior Prediction Techniques for Non-Uniform Ni/SiC Schottky Diodes
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Low-Parasitic-Capacitance Self-Aligned 4H-SiC nMOSFETs for Harsh Environment Electronics
p.971

Complementary p-Channel and n-Channel SiC MOSFETs for CMOS Integration
p.975

An Improved I-V Model of GaN HEMT for High Temperature Applications
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Electrical Characterization of the Operational Amplifier Consisting of 4H-SiC MOSFETs after Gamma Irradiation
p.984

Magnetic Field Sensing with 4H SiC Diodes: N vs P Implantation
p.988

HomeMaterials Science ForumMaterials Science Forum Vol. 924Low-Parasitic-Capacitance Self-Aligned 4H-SiC...

Low-Parasitic-Capacitance Self-Aligned 4H-SiC nMOSFETs for Harsh Environment Electronics

Abstract:

Low-parasitic-capacitance 4H-SiC nMOSFETs using a novel self-aligned process were suggested and demonstrated. In these nMOSFETs, device characteristics including parasitic capacitances (gate-source, gate-drain, drain-source capacitance) were investigated and low parasitic capacitance was achieved by the self-aligned structure.

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Periodical:

Materials Science Forum (Volume 924)

Pages:

971-974

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.924.971

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Online since:

June 2018

Authors:

Tatsuya Kurose*, Shin Ichiro Kuroki, Seiji Ishikawa, Tomonori Maeda, Hiroshi Sezaki, Takahiro Makino, Takeshi Ohshima, Mikael Östling, Carl Mikael Zetterling

Keywords:

4H-SiC nMOSFET, Harsh Environment Electronics, Self-Aligned Process

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