Multi-Barrier Height Characterization and DLTS Study on Ti/W 4H-SiC Schottky Diode

Teng Zhang; Christophe Raynaud; Dominique Planson

doi:10.4028/www.scientific.net/MSF.963.576

Paper Titles

On the Development of 1700V SiC JBS Diodes in a 6-Inch Foundry
p.558

Mechanisms and Characteristics of Large-Area High-Current-Density 4H-SiC Trench Junction Barrier Schottky Diodes
p.562

Advanced Electrical Characterisation of High Voltage 4H-SiC PiN Diodes
p.567

Performance of 4H-SiC Bipolar Diodes as Temperature Sensor at Low Temperatures
p.572

Multi-Barrier Height Characterization and DLTS Study on Ti/W 4H-SiC Schottky Diode
p.576

Comparison of SiC MOSFET Characteristics Following Body-Diode Forward-Current Stress
p.583

Achieving Reduced Specific On-Resistance in 1.2 kV SiC Power MOSFETs at Elevated Temperature
p.588

Temperature Dependency of Silicon Carbide MOSFET On-Resistance Characterization and Modeling
p.592

Temperature Dependence of dV/dt Impact on the SiC-MOSFET
p.596

HomeMaterials Science ForumMaterials Science Forum Vol. 963Multi-Barrier Height Characterization and DLTS...

Multi-Barrier Height Characterization and DLTS Study on Ti/W 4H-SiC Schottky Diode

Abstract:

Schottky barrier height (SBH) has been characterized on 4H-SiC Schottky diodes with metal contact of Ti/W by Current-Voltage (I-V) and Capacitance-Voltage (C-V) measurements between 80 K and 400 K. Multi-barrier has been recognized and calculated according to different models. No clear difference has been found between single barrier diode and diode with multi-barrier from DLTS tests. Evolution on the I-V characteristics has been observed after high temperature annealing. The effect of annealing at room temperature (RT) and high temperature DLTS scan (stress under high temperature) have also been studied on both static characteristics and DLTS results.