Performance Improvement of &gt;10kV SiC IGBTs with Retrograde p-Well

Amit Tiwari; Marina Antoniou; Neo Lophitis; Samuel Perkins; Tatjana Trajkovic; Florin Udrea

doi:10.4028/www.scientific.net/MSF.963.639

Paper Titles

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Impact of Interface Trap Density of SiC-MOSFET in High-Temperature Environment
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HomeMaterials Science ForumMaterials Science Forum Vol. 963Performance Improvement of >10kV SiC IGBTs with...

Performance Improvement of >10kV SiC IGBTs with Retrograde p-Well

Abstract:

A p-well consisting of a retrograde doping profile is investigated for performance improvement of >10kV SiC IGBTs. The retrograde p-well, which can be realized using low-energy shallow implants, effectively addresses the punch-through, a common issue in high-voltage vertical architectures consisting of a conventional p-well with typical doping density of 1e17cm^-3 and depth 1μm. The innovative approach offers an extended control over the threshold voltage. Without any punch-through, a threshold voltage in the range 6V-7V is achieved with gate-oxide thickness of 100nm. Gate oxide thickness is typically restricted to 50nm if a conventional p-well with doping density of 1e17cm^-3 is utilized. We therefore propose a highly promising solution, the retrograde p-well, for the development of >10kV SiC IGBTs.

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Periodical:

Materials Science Forum (Volume 963)

Pages:

639-642

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.963.639

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Online since:

July 2019

Authors:

Amit Tiwari, Marina Antoniou, Neo Lophitis, Samuel Perkins, Tatjana Trajkovic*, Florin Udrea

Keywords:

Breakdown Voltage, High-Voltage SiC IGBT, Ion-Implantation, Punch-Through, Retrograde p-Well, Threshold Voltage Control

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