Paper Titles

Electrical Characterization of Buried Layers in Silicon
p.85

Mechanism of Buried Oxide Formation by Implanted Oxygen
p.115

Diffusion of Ion-Implanted Group III and V Impurities in SlO₂
p.133

Annealing of Implants Reduces Lattice Defects and 1/f Noise
p.153

Formation and Optimization of Shallow Junctions by Ion Implantation and Rapid Thermal Annealing for CMOS Application
p.159

Fabrication of Nanometer Doping Structures by Secondary Implantation
p.169

The Use of Ion Implantation for Lifetime Control in Silicon Devices
p.177

Silicon Surface and Interface Damage Studies Using Ion Implantation
p.187

Recoil Implantation for Shallow Junction Formation in Silicon
p.195

HomeSolid State PhenomenaSolid State Phenomena Vols. 1-2Formation and Optimization of Shallow Junctions by...

Formation and Optimization of Shallow Junctions by Ion Implantation and Rapid Thermal Annealing for CMOS Application

Article Preview

Abstract:

You might also be interested in these eBooks

Ion Implantation in Semiconductors

Info:

Periodical:

Solid State Phenomena (Volumes 1-2)

Pages:

159-168

DOI:

https://doi.org/10.4028/www.scientific.net/SSP.1-2.159

Citation:

Cite this paper

Online since:

January 1988

Authors:

I Wei Wu

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

© 1988 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation: