Application of Single-Wafer Wet Cleaning Prior to Epitaxial SiGe Process

Abstract:

Article Preview

Strained silicon engineering was first used at the 90-nm node. Nowadays, a series of techniques has seen wide-spread use and many derivatives are available because of their ease of integration and cost-effective features [ , ]. As a main part of stressor technique, embedded SiGe-S/D technology is reported to improve the pMOSFET drive current [ , ].

Info:

Periodical:

Solid State Phenomena (Volumes 145-146)

Edited by:

Paul Mertens, Marc Meuris and Marc Heyns

Pages:

173-176

DOI:

10.4028/www.scientific.net/SSP.145-146.173

Citation:

K. Sano et al., "Application of Single-Wafer Wet Cleaning Prior to Epitaxial SiGe Process", Solid State Phenomena, Vols. 145-146, pp. 173-176, 2009

Online since:

January 2009

Export:

Price:

$35.00

In order to see related information, you need to Login.

In order to see related information, you need to Login.