Poly-Silicon Etch with Diluted Ammonia: Application to Replacement Gate Integration Scheme

Abstract:

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With the continuous down scaling features sizes, the need of speed increase and power consumption reduction start to be more and more critical. The classical integration scheme of poly silicon gate on CMOS devices does not meet the requirements of the 45 nm technology node and beyond. On this matter, new materials and different integration flows are being investigated in order to improve the device performance. High-k materials associated with metals are actively investigated as new gate materials in which different integration approaches like metal gate first or metal gate last are proposed [1].

Info:

Periodical:

Solid State Phenomena (Volumes 145-146)

Edited by:

Paul Mertens, Marc Meuris and Marc Heyns

Pages:

207-210

DOI:

10.4028/www.scientific.net/SSP.145-146.207

Citation:

F. Sebaai et al., "Poly-Silicon Etch with Diluted Ammonia: Application to Replacement Gate Integration Scheme", Solid State Phenomena, Vols. 145-146, pp. 207-210, 2009

Online since:

January 2009

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Price:

$35.00

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