Impact of Galvanic Corrosion on Metal Gate Stacks

Abstract:

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High-k gate dielectrics (HK), such as HfO2 or HfSiON, are being considered as the gate dielectric option for the 45nm node and beyond. In order to alleviate the Fermi-level pinning issue and to enhance the CET (Capacitive Effective Thickness) by generating the depletion layer in poly-Silicon gate, metal gate electrodes with proper work functions (WF) have to be used on the high-k dielectrics.

Info:

Periodical:

Solid State Phenomena (Volumes 145-146)

Edited by:

Paul Mertens, Marc Meuris and Marc Heyns

Pages:

215-218

DOI:

10.4028/www.scientific.net/SSP.145-146.215

Citation:

M. Wada et al., "Impact of Galvanic Corrosion on Metal Gate Stacks", Solid State Phenomena, Vols. 145-146, pp. 215-218, 2009

Online since:

January 2009

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Price:

$35.00

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